• Title/Summary/Keyword: Transimpedance Amplifier(TIA)

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Design of a 1-Gb/s CMOS Optical Receiver for POF Applications (1-Gb/s CMOS POF 응용 광수신기 설계)

  • Lee, Jun-hyup;Lee, Soo-young;Jang, Kyu-bok;Yu, Chong-gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.241-244
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    • 2012
  • In this paper, three types of optical receivers are designed using a $0.35-{\mu}m$ standard CMOS technology for plastic optical fiber (POF) applications. Basic common-source transimpedance amplifier (CS-TIA), common-gate TIA (CG-TIA), and regulated-cascode TIA (RGC-TIA) are optimally designed, and their transimpedance gain (TZ gain), 3-dB bandwidth, and noise characteristics are compared and analyzed. As a result of simulations, the RGC-TIA indicates better TZ gain and 3-dB bandwidth than other topologies, and CS-TIA has the best noise performance. Each optical receiver occupies area of $0.35mm^2$.

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A Design and Implementation of 4×10 Gb/s Transimpedance Amplifiers (TIA) Array for TWDM-PON (TWDM-PON 응용을 위한 4×10 Gb/s Transimpedance Amplifier 어레이 설계 및 구현)

  • Yang, Choong-Reol;Lee, Kang-Yoon;Lee, Sang-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39B no.7
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    • pp.440-448
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    • 2014
  • A $4{\times}10$ Gb/s Transimpedance Amplifier (TIA) array is implemented in $0.13{\mu}m$ CMOS process technology, which will be used in the receiver of TWDM-PON system. A technology for bandwidth enhancement of a given $4{\times}10$ Gb/s TIA presented under inductor peaking technology and a single 1.2V power supply based low voltage design technology. It achieves 3 dB bandwidth of 7 GHz in the presence of a 0.5 pF photodiode capacitance. The trans-resistance gain is $50dB{\Omega}$, while 48 mW/ 1channel from a 1.2 V supply. The input sensitivity of the TIA is -27 dBm. The chip size is $1.9mm{\times}2.2mm$.

A Multi-channel CMOS Feedforward Transimpedance Amplifier Array for LADAR Systems (라이다 시스템용 멀티채널 CMOS 피드포워드 트랜스임피던스 증폭기 어레이)

  • Kim, Seung-Hoon;Park, Sung Min
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.12
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    • pp.1737-1741
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    • 2015
  • A multi-channel CMOS transimpedance amplifier(TIA) array is realized in a $0.18-{\mu}m$ CMOS technology for the applications of panoramic scan LADAR systems. Each channel consists of a PIN photodiode and a feed-forward TIA that exploits an inverter input stage followed by a feed-forward common-source amplifier so as to achieve lower noise and higher gain than a conventional voltage-mode inverter TIA. Measured results demonstrate that each channel achieves $76-dB{\Omega}$ transimpedance gain, 720-MHz bandwidth, and -20.5-dBm sensitivity for $10^{-9}$ BER. Also, a single channel dissipates the power dissipation of 30 mW from a single 1.8-V supply, and shows less than -33-dB crosstalk between adjacent channels.

10 Gbps Transimpedance Amplifier-Receiver for Optical Interconnects

  • Sangirov, Jamshid;Ukaegbu, Ikechi Augustine;Lee, Tae-Woo;Cho, Mu Hee;Park, Hyo-Hoon
    • Journal of the Optical Society of Korea
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    • v.17 no.1
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    • pp.44-49
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    • 2013
  • A transimpedance amplifier (TIA)-optical receiver (Rx) using two intersecting active feedback system with regulated-cascode (RGC) input stage has been designed and implemented for optical interconnects. The optical TIA-Rx chip is designed in a 0.13 ${\mu}m$ CMOS technology and works up to 10 Gbps data rate. The TIA-Rx chip core occupies an area of 0.051 $mm^2$ with power consumption of 16.9 mW at 1.3 V. The measured input-referred noise of optical TIA-Rx is 20 pA/${\surd}$Hz with a 3-dB bandwidth of 6.9 GHz. The proposed TIA-Rx achieved a high gain-bandwidth product per DC power figure of merit of 408 $GHz{\Omega}/mW$.

A 16-channel CMOS Inverter Transimpedance Amplifier Array for 3-D Image Processing of Unmanned Vehicles (무인차량용 3차원 영상처리를 위한 16-채널 CMOS 인버터 트랜스임피던스 증폭기 어레이)

  • Park, Sung Min
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.12
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    • pp.1730-1736
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    • 2015
  • This paper presents a 16-channel transimpedance amplifier (TIA) array implemented in a standard $0.18-{\mu}m$ CMOS technology for the applications of panoramic scan LADAR (PSL) systems. Since this array is the front-end circuits of the PSL systems to recover three dimensional image for unmanned vehicles, low-noise and high-gain characteristics are necessary. Thus, we propose a voltage-mode inverter TIA (I-TIA) array in this paper, of which measured results demonstrate that each channel of the array achieves $82-dB{\Omega}$ transimpedance gain, 565-MHz bandwidth for 0.5-pF photodiode capacitance, 6.7-pA/sqrt(Hz) noise current spectral density, and 33.8-mW power dissipation from a single 1.8-V supply. The measured eye-diagrams of the array confirm wide and clear eye-openings up to 1.3-Gb/s operations. Also, the optical pulse measurements estimate that the proposed 16-channel TIA array chip can detect signals within 20 meters away from the laser source. The whole chip occupies the area of $5.0{\times}1.1mm^2$ including I/O pads. For comparison, a current-mode 16-channel TIA array is also realized in the same $0.18-{\mu}m$ CMOS technology, which exploits regulated-cascode (RGC) input configuration. Measurements reveal that the I-TIA array achieves superior performance in optical pulse measurements.

Analysis of Quenching Resistor Effect to Improve Stability of TIA Circuit for APD (APD용 TIA 회로의 안정성 개선을 위한 Quenching 저항 영향 분석)

  • Ki, Dong-Han;Jin, Yu-Rin;Kim, Sung-Mi;Cho, Seong-Ik
    • Journal of IKEEE
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    • v.26 no.3
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    • pp.373-379
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    • 2022
  • In this paper, since the APD(Avalanche Photo Diode) for LTV(Light to Voltage) conversion uses a high voltage in the operating range unlike other PD(Photo Diode)s, the quenching resistor must be connected in series to prevent overcurrent when using the TIA(Transimpedance Amplifier). In such a case, quenching resistance may affect the transfer function of the TIA circuit, resulting in serious stability. Therefore, in this paper, by analyzing the effect of APD quenching resistance on the voltage and current loop transfer function of TIA, we propose a loop analysis and a method for determining the quenching resistance value to improve stability. TIA circuit with quenching resistance was designed by the proposed method and the stability of operation was verified through simulation and chip fabrication.

Multichannel Transimpedance Amplifier Away in a $0.35\mu m$ CMOS Technology for Optical Communication Applications (광통신용 다채널 CMOS 차동 전치증폭기 어레이)

  • Heo Tae-Kwan;Cho Sang-Bock;Park Min Park
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.8 s.338
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    • pp.53-60
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    • 2005
  • Recently, sub-micron CMOS technologies have taken the place of III-V materials in a number of areas in integrated circuit designs, in particular even for the applications of gjgabit optical communication applications due to its low cost, high integration level, low power dissipation, and short turn-around time characteristics. In this paper, a four-channel transimpedance amplifier (TIA) array is realized in a standard 0.35mm CMOS technology Each channel includes an optical PIN photodiode and a TIA incorporating the fully differential regulated cascode (RGC) input configuration to achieve effectively enhanced transconductance(gm) and also exploiting the inductive peaking technique to extend the bandwidth. Post-layout simulations show that each TIA demonstrates the mid-band transimpedance gain of 59.3dBW, the -3dB bandwidth of 2.45GHz for 0.5pF photodiode capacitance, and the average noise current spectral density of 18.4pA/sqrt(Hz). The TIA array dissipates 92mw p in total from a single 3.3V supply The four-channel RGC TIA array is suitable for low-power, high-speed optical interconnect applications.

Design and Fabrication of 0.25 μm CMOS TIA Using Active Inductor Shunt Peaking (능동형 인덕터 Shuut Peaking을 이용한 0.25 μm CMOS TIA 설계 및 제작)

  • Cho In-Ho;Lim Yeongseog
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.9 s.100
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    • pp.957-963
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    • 2005
  • This paper presents technique of wideband TIA for optical communication systems using TSMC 0.25 ${\mu}m$ CMOS RF-Mixed mode. In order to improve bandwidth characteristics of an TIA, we use active inductor shunt peaking to cascode and common-source configuration. The result shows the 37 mW and 45 mW power dissipation with 2.5 V bias and 61 dB$\Omega$ and 61.4 dB$\Omega$ transimpedance gain. And the -3 dB bandwidth of the TIA is enhanced from 0.8 GHz to 1.45 GHz in cascode and 0.61 GHz to 0.9 GHz in common-source. And the input noise current density is $5 pA/\sqrt{Hz}$ and $4.5 pA/\sqrt{Hz}$, and -10 dB out put return loss is obtained in 1.45 GHz. The total size of the chip is $1150{\times}940{\mu}m^2$.

10Gb/s CMOS Transimpedance Amplifier Designs for Optical Communications (광통신용 10Gb/s CMOS 전치증폭기 설계)

  • Sim, Su-Jeong;Park, Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.10 s.352
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    • pp.1-9
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    • 2006
  • In this paper, a couple of 10Gb/s transimpedance amplifiers are realized in a 0.18um standard CMOS technology for optical communication applications. First, the voltage-mode inverter TIA(I-TIA) exploits inverter input configuration to achieve larger effective gm, thus reducing the input impedance and increasing the bandwidth. I-TIA demonstrates $56dB{\Omega}$ transimpedance gain, 14GHz bandwidth for 0.25pF photodiode capacitance, and -16.5dBm optical sensitivity for 0.5A/W responsivity, 9dB extinction ration and $10^{-12}$ BER. However, both its inherent parasitic capacitance and the package parasitics deteriorate the bandwidth significantly, thus mandating very judicious circuit design. Meanwhile, the current-mode RGC TIA incorporates the regulated cascade input configuration, and thus isolates the large input parasitic capacitance from the bandwidth determination more effectively than the voltage-mode TIA. Also, the parasitic components give much less impact on its bandwidth. RGC TIA provides $60dB{\Omega}$ transimpedance gain, 10GHz bandwidth for 0.25pF photodiode capacitance, and -15.7dBm optical sensitivity for 0.5A/W responsivity, 9dB extinction ration and $10^{-12}$ BER. Main drawback is the power dissipation which is 4.5 times larger than the I-TIA.

Multi-channel Transimpedance Amplifier Arrays in Short-Range LADAR Systems for Unmanned Vehicles (무인차량용 단거리 라이다 시스템을 위한 멀티채널 트랜스임피던스 증폭기 어레이)

  • Jang, Young Min;Kim, Seung Hoon;Cho, Sang Bock;Park, Sung Min
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.12
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    • pp.40-48
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    • 2013
  • This paper presents multi-channel transimpedance amplifier(TIA) arrays in short-range LADAR systems for unmanned vehicles, by using a 0.18um CMOS technology. Two $4{\times}4$ channel TIA arrays including a voltage-mode INV-TIA and a current-mode CG-TIA are introduced. First, the INV-TIA consists of a inverter stage with a feedback resistor and a CML output buffer with virtual ground so as to achieve low noise, low power, easy current control for gain and impedance. Second, the CG-TIA utilizes a bias from on-chip bandgap reference and exploits a source-follower for high-frequency peaking, yielding 1.26 times smaller chip area per channel than INV-TIA. Post-layout simulations demonstrate that the INV-TIA achieves 57.5-dB${\Omega}$ transimpedance gain, 340-MHz bandwidth, 3.7-pA/sqrt(Hz) average noise current spectral density, and 2.84mW power dissipation, whereas the CG-TIA obtains 54.5-dB${\Omega}$ transimpedance gain, 360-MHz bandwidth, 9.17-pA/sqrt(Hz) average noise current spectral density, and 4.24mW power dissipation. Yet, the pulse simulations reveal that the CG-TIA array shows better output pulses in the range of 200-500-Mb/s operations.