• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.10 no.6
• /
• pp.1337-1345
• /
• 2009

In the railway, the delay of a train may affect the schedule of other trains. Hence, the timetable management activity involving overtaking and transferring becomes an important issue. The timetable rescheduling is the conflict resolution of the disrupted schedule and a matter of deciding the sequence of moves among trains and the place for meeting. In Korea, there are few cases where operations research models were applied to railway timetable rescheduling problem in consideration of the transfer between Korea Train eXpress (KTX) trains and conventional trains. Hence, we present a mathematical approach that can minimize the total delay of the whole trains secondly. We applied the model to the exemplary section of a double-line track, the Gyung-Boo Line, and it is confirmed that the mathematical model could effectively address the transfer service as well as the complicated railway conflicts of Gyung-Boo Line.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.26 no.10
• /
• pp.1537-1544
• /
• 2022

When designing chip, it considers design specification, timing problem, and clock synchronization on place & route (P&R) process. P&R process is complicated because of considering various factors. Chip uses clock tree synthesis (CTS) to reduce clock path delay. The purpose of this study is to examine shallow-CTS algorithm for checking clock tree synthesizable. Using open source Parser-Verilog, register transfer level (RTL) synthesizable Verilog file is parsed and it uses Pre-CTS and Post-CTS process that is included shallow-CTS. Based on longest clock path in the Pre-CTS and Post-CTS stages, the standard deviation before and after buffer insertion is compared and analyzed for the accuracy of CTS. In this paper, It is expected that the cost and time problem could be reduced by providing a pre-clock tree synthesis verification method at the RTL level without confirming the CTS result using the time-consuming licensed EDA tool.

• Journal of KIISE:Software and Applications
• /
• v.35 no.5
• /
• pp.281-287
• /
• 2008

Data transfers occur during the execution time of a Java program, from constant to variable, from variable to other variable and so on. Data are located in memory and hence data transfer requires access to memory. As memory access generates both time delay and energy consumption it is absolutely necessary to know the data transfer overheads incurred among different paths not only to write an efficient program but also to build a high-performance Java virtual machine. In this paper we classify Java memory into three different regions, constant, local variable, and field, and then investigate data transfer overheads among these regions. The result says that the transfer between local variables incur the least overhead usually, while the transfer between fields incur the most. The difference of overheads reaches up to a double. Optimization techniques like JIT reduces the data transfer overhead dramatically. It is observed that the overhead is reduced from 14 to 27 times for the case of Hotspot JVM.

• Smart Structures and Systems
• /
• v.14 no.6
• /
• pp.1221-1245
• /
• 2014

Real-time hybrid simulation (RTHS) is a promising cyber-physical technique used in the experimental evaluation of civil infrastructure systems subject to dynamic loading. In RTHS, the response of a structural system is simulated by partitioning it into physical and numerical substructures, and coupling at the interface is achieved by enforcing equilibrium and compatibility in real-time. The choice of partitioning parameters will influence the overall success of the experiment. In addition, due to the dynamics of the transfer system, communication and computation delays, the feedback force signals are dependent on the system state subject to delay. Thus, the transfer system dynamics must be accommodated by appropriate actuator controllers. In light of this, guidelines should be established to facilitate successful RTHS and clearly specify: (i) the minimum requirements of the transfer system control, (ii) the minimum required sampling frequency, and (iii) the most effective ways to stabilize an unstable simulation due to the limitations of the available transfer system. The objective of this paper is to establish a stability switch criterion due to systematic experimental errors. The RTHS stability switch criterion will provide a basis for the partitioning and design of successful RTHS.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.15 no.7
• /
• pp.615-620
• /
• 2002

In the case of immobilizing of glucose oxidase into polypyrrole (PPy) using electrosynthesis, the glucose oxidise (GOx) forms a coordinate bond with the polymers backbone. However, because of intrinsic insulation and net-chain of the enzyme, the charge transfer and mass transport are obstructed during the film growth. Therefore, the film growth is dull. We synthesized enzyme electrodes by electropolymerization added some organic solvent, such as ethanol and tetrahydrofuran (THF). The formative seeds of film growth was delayed by adding ethanol. The delay was induced by radical transfer between ethanol and pyrrole monomer. The radical transfer reactions shared the contribution of dopants between electrolyte anion and GOx polyanion. This led to increase amount of immobilized the enzyme in PPy. For the UV absorption spectra of synthetic solution before synthesis and after, in the case of ethanol added, the optical density was slightly decreased for the GOx peaks. It suggests amount of GOx in the solution was decreased and amount of GOx in the film was increased.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.27 no.5C
• /
• pp.454-464
• /
• 2002

In the ATM-PON (Asynchronous Transfer Mode-Passive Optical Network), the downstream cell transmitted by an OLT is broadcast to all ONUs. The ONU receives selectively its own cells by VP filtering. On the other hand, the upstream cell can be transmitted by ONU in the case of receiving a grant from the OLT. After providing the grant to an ONU, the OLT expects the arrival of a cell after an elapse of the equalized round trip delay. ITU-T G.983.1 recommends that one bit error is allowed between the expected arrival time and the actual arrival time at the OLT. Because the ONU processes the different delay to each type of grant (ranging, user cell, and mimi-slot grant), it is not simple to design the transmission part of ONU. In this paper, we implement a grant processor which provides the delay accurately in the ONU TC chip with the FPGA. For the given equalized delay, it deals with the delay for the cell, the byte, and the bit unit by using the shift register, the byte counter, and the D flip-flop, respectively. We verify the operation of the grant processor by the time simulation and the measurement of the optical board output.

• Journal of the Korea Computer Industry Society
• /
• v.2 no.9
• /
• pp.1163-1174
• /
• 2001

A general goal of the ATM(Asynchronous Transfer Mode) network is to support connections across various networks. ABR service using EPRCA(Enhanced Proportional Rate Control Algorithm) switch controls traffics in ATM network. EPRCA switch, traffic control method uses variation of the ACR(Allowed Cell Rate) to enhance the utilization of the link bandwidth. However, in ABR(Available Bit Rate) service, different treatments are offered according to different RTTs(Round Trip Times) of connections. To improve the above unfairness, this paper presents ABR DELAY mechanism, in which three reference parameters for cell delay are defined, and reflect on the messages of RM(Resource Management) cells. To evaluate our mechanism, we compare the fairness among TCP connections between ABR DELAY mechanism and ABR RRM mechanism. And also we execute simulations on a simple ATM network model where six TCP connections and a background traffic with different RTTs share the bandwidth of a bottleneck link. The simulation results, based on TCP goodput and efficiency, clearly show that ABR DELAY mechanism improves the fairness among TCP connections.

• Journal of the Korea Society of Computer and Information
• /
• v.29 no.9
• /
• pp.115-123
• /
• 2024

This paper proposes a method to reduce the delay time caused by control message conflicts in VADAMA (Virtual Allocation Demand Assigned Multiple Access) technology, which is a virtual allocation based on-demand multiple access technology in MF-TDMA (Multi-Frequency Time Division Multiple Access) satellite network. Traditionally, satellite networks have had the problem that all network transmissions have long delay times due to control messages. In this study, in order to improve the delay time caused by terminal control message conflicts in VADAMA technology, the concept of virtual allocation is used to reduce the delay time. VADAMA-PTR (VADAMA Periodic Transmission) divides all terminals into subnets and transmits control. The method is proposed, and the performance analysis of the existing DAMA technology, delay time and data processing rate is performed using Matlab. The results show that the performance is improved.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.4 no.4
• /
• pp.13-18
• /
• 1967

Since all the poles of the open circuit voltage transfer function of the trigonometric, linear, passive RC circuits exist on the negative real axis of s-plane, its transient response to the unit step input is monotonic. This satisfies the necessary conditions for the applicability of Elmore's method which had been developed originally for the transient analysis of lumped circuit in computing the rise time and delay time of the trigonometric distributed RC circuits. This paper describes the computing method of rise and delay times of the trigonometric distributed RC circuit. The analysis shows that the transient response of this kind circuit depends only upon the time constant and distance angle $\theta$. As $\theta$ is increased, the rise and delay titles are increased non-linearly.

• The KIPS Transactions:PartC
• /
• v.10C no.5
• /
• pp.603-610
• /
• 2003

On the optical network, it is important to build restoration scheme capable to network survivability in preparation of potential failure on communication route. This paper analyze the existing schemes on restoration of failure on the optical network, and propose deferred commit scheme to improve resource utilization and management efficiency. Also, the transfer flow of messages needed for transferring restoration signal are presented in a concrete way and delay time required by shared mesh restoration scheme is explained in a substantial way. Simulation-based comparative analysis of various schemes is performed.