• Title/Summary/Keyword: Tracking Bandwidth

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A 1.248 Gb/s - 2.918 Gb/s Low-Power Receiver for MIPI-DigRF M-PHY with a Fast Settling Fully Digital Frequency Detection Loop in 0.11 ㎛ CMOS

  • Kim, Sang-Yun;Lee, Juri;Park, Hyung-Gu;Pu, Young Gun;Lee, Jae Yong;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.4
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    • pp.506-517
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    • 2015
  • This paper presents a 1.248 Gb/s - 2.918 Gb/s low-power receiver MIPI-DigRF M-PHY with a fully digital frequency detection loop. MIPI-DigRF M-PHY should be operated in a very short training time which is $0.01{\mu}s$ the for HS-G2B mode. Because of this short SYNC pattern, clock and data recovery (CDR) should have extremely fast locking time. Thus, the quarter rate CDR with a fully digital frequency detection loop is proposed to implement a fast phase tracking loop. Also, a low power CDR architecture, deserializer and voltage controlled oscillator (VCO) are proposed to meet the low power requirement of MIPI-DigRF M-PHY. This chip is fabricated using a $0.11{\mu}m$ CMOS process, and the die area is $600{\mu}m{\times}250{\mu}m$. The power consumption of the receiver is 16 mW from the supply voltage of 1.1 V. The measured lock time of the CDR is less than 20 ns. The measured rms and peak jitter are $35.24ps_{p-p}$ and $4.25ps_{rms}$ respectively for HS-G2 mode.

MUVIS: Multi-Source Video Streaming Service over WLANs

  • Li Danjue;Chuah Chen-Nee;Cheung Gene;Yoo S. J. Ben
    • Journal of Communications and Networks
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    • v.7 no.2
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    • pp.144-156
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    • 2005
  • Video streaming over wireless networks is challenging due to node mobility and high channel error rate. In this paper, we propose a multi-source video streaming (MUVIS) system to support high quality video streaming service over IEEE 802.1l-based wireless networks. We begin by collocating a streaming proxy with the wireless access point to help leverage both the media server and peers in the WLAN. By tracking the peer mobility patterns and performing content discovery among peers, we construct a multi-source sender group and stream video using a rate-distortion optimized scheme. We formulate such a multi-source streaming scenario as a combinatorial packet scheduling problem and introduce the concept of asynchronous clocks to decouple the problem into three steps. First, we decide the membership of the multisource sender group based on the mobility pattern tracking, available video content in each peer and the bandwidth each peer allocates to the multi-source streaming service. Then, we select one sender from the sender group in each optimization instance using asynchronous clocks. Finally, we apply the point-to-point rate-distortion optimization framework between the selected sender-receiver pair. In addition, we implement two different caching strategies, simple caching simple fetching (SCSF) and distortion minimized smart caching (DMSC), in the proxy to investigate the effect of caching on the streaming performance. To design more realistic simulation models, we use the empirical results from corporate wireless networks to generate node mobility. Simulation results show that our proposed multi-source streaming scheme has better performance than the traditional server-only streaming scheme and that proxy-based caching can potentially improve video streaming performance.

A Hardware Implementation of Pyramidal KLT Feature Tracker (계층적 KLT 특징 추적기의 하드웨어 구현)

  • Kim, Hyun-Jin;Kim, Gyeong-Hwan
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.46 no.2
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    • pp.57-64
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    • 2009
  • This paper presents the hardware implementation of the pyramidal KLT(Kanade-Lucas-Tomasi) feature tracker. Because of its high computational complexity, it is not easy to implement a real-time KLT feature tracker using general-purpose processors. A hardware implementation of the pyramidal KLT feature tracker using FPGA(Field Programmable Gate Array) is described in this paper with emphasis on 1) adaptive adjustment of threshold in feature extraction under diverse lighting conditions, and 2) modification of the tracking algorithm to accomodate parallel processing and to overcome memory constraints such as capacity and bandwidth limitation. The effectiveness of the implementation was evaluated over ones produced by its software implementation. The throughput of the FPGA-based tracker was 30 frames/sec for video images with size of $720{\times}480$.

Development of GPS data recovery circuit using CPSO (CPSO를 이용한 GPS위성 데이터 추출회로 개발)

  • 변건식;정명덕;박지언;최희주;김성곤
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.2 no.3
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    • pp.317-323
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    • 1998
  • A synchronization is important element not only wire communication but also wireless communication. Especially, In SS(Spread Spectrum) communication method used GPS(Global Positioning System) synchronization is more important. A synchronous oscillator(SO) is a network which synchronizes, tracks, filter, amplifies and divides (if necessary) in a single process. Without an input signal, the SO is a free-running oscillator, oscillating at a frequency $w_0$, but phase changes $180^{\circ}$ within tracking range of SO. Therefore CPSO was used for this problem. The coherent phase synchronous oscillator(CPSO) is created by adding two external loops to the SO and has a wider tracking bandwidth and a zero-offset phase response (coherent) while maintaining the SO properties of high signal-to-rejection and fast frequency acquisition times. Therefore phase between input signal and output signal is synchronized. In this paper, GPS data recovery circuit has applied CPSO using front reference characters and has certified an excellent data recovery capability.

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A method for setting coherent processing interval of continuous active sonar based on correlation of GSFM pulse (GSFM 펄스의 상관도에 기반한 연속 송수신 소나의 신호처리 구간 설정 방법)

  • Kim, Hyeon-su;Kim, Hyun-woo;Lee, Won-oh;Park, Song-hwa;Lee, Jung-hoon;Park, Gyu-tae
    • The Journal of the Acoustical Society of Korea
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    • v.40 no.5
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    • pp.401-407
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    • 2021
  • The continuous active sonar technology is effective for detecting and tracking targets because of short target revisiting rate. Generalized Sinusoidal Frequency Modulation (GSFM) pulses suitable for continuous active sonar systems are known to be capable of obtaining high time-bandwidth product while maintaining the orthogonality between pulses. However, it is unknown how to calculate an appropriate length of time to correlate received GSFM pulses in the presence of a target with acceleration. In this paper, we propose a method to calculate the appropriate time length based on the correlation when matching the received signal in the continuous active sonar system using GSFM pulse. The proposed method calculates the correlation according to the acceleration of the target and calculates the signal processing length according to the correlation. It is shown that stable detection performance can be obtained when the signal processing length calculated by the proposed method through the level of the sidelobe is applied.

An Efficient Location Management Scheme in Locaton - Aware Computing (위치 인식 컴퓨팅에서 효율적인 위치 관리 기법)

  • MoonBae, Song;KwangJin, Park;Chong-Sun, Hwang
    • Journal of KIISE:Databases
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    • v.31 no.5
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    • pp.505-515
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    • 2004
  • One of the most important issue in location-aware computing is tracking moving objects efficiently. To this end, an efficient protocol which updates location information in a location server is highly needed. In fact, the performance of a location update strategy highly depends on the assumed mobility pattern. In most existing works, however, the mobility issue has been disregarded and too simplified as linear function of time. In this paper, we propose a new mobility model, called state-based mobility model (SMM) to provide more generalized framework for both describing the mobility and updating location information of complexly moving objects. We also introduce the state-based location update protocol (SLUP) based on this mobility model. Using experimental comparison, we illustrate that the proposed technique is many times better in reducing location update cost and the communication bandwidth consumption.

A Study on the Speed Control of BLDC Motor Using the Feedforward Compensation (전향보상을 이용한 BLDC 전동기의 속도제어에 관한 연구)

  • 박기홍;김태성;현동석
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.3
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    • pp.253-259
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    • 2004
  • This paper presents a speed controller method based on the disturbance torque observer for high-performance speed control of the brushless DC (RLDC) motor. In case of the speed control of robot arms and tracking applications with lower stiffness, we cannot design the speed controller gain to be very large from the viewpoint of the system stability Thus, the feedforward compensation method using disturbance torque observer was proposed. This method can improve the speed characteristic without increasing the speed controller gain. The speed characteristic against disturbance torque can be improved when the bandwidth of the speed controller cannot be made large enough. Consequently, the speed control of the BLDC motor for the high-performance application become achieved.

A Design on the Four-Horn Triple-Mode Type Monopulse Feeder at X-Band (X-대역 4혼 삼중 모드 모노펄스 급전기 설계)

  • Kim, Chan-Hong;Kim, Seung-Gak
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.5
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    • pp.528-536
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    • 2010
  • A monopulse feeder gives the most important impact upon the radiation pattern characteristics of a multi-function radar or a tracking radar which uses the space feed. It is described that the triple-mode type monopulse feeder which possesses the optimum aperture illumination for three monopulse channels is designed and measured in this paper. The measured results show that the designed feeder has not only the characteristics of the optimum aperture illimination in each channel and also very low return loss over the 10 % of fractional bandwidth at X-band. This means that the feeder provides the antenna system with low sidelobe level and high monopulse slope characteristics.

Development of Improved 5th Order Motion Profile for Low Vibration and High Speed (저진동, 고속특성을 가지는 개선된 5차 모션 프로파일의 설계)

  • So, Byeong-Kwan;Tae, Won-Hyeong;Kim, Jung-Han
    • Journal of the Korean Society for Precision Engineering
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    • v.29 no.10
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    • pp.1110-1118
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    • 2012
  • In this study, for reducing the residual vibration in high speed motion control stage, an improved 5th order polynomial motion profile was developed. When a stage is moving, the current through the motor coils has the same profile of input motion profile of acceleration, therefore the characteristics of the acceleration input profile directly affect on the performance of the amplifier that includes the current control loop. Commonly low cost amplifier and motor has a narrow current control bandwidth, therefore the proposed algorithm was designed based on this practical constraint. Simulation and experimental results showed that the proposed algorithm clearly has low residual vibration characteristics than conventional 5th order polynomial motion profile on the same drive condition.

A Study on the Speed Control of BLDC Motor Using the Feedforward Compensation (전향보상을 이용한 BLDC 모터의 속도제어에 관한 연구)

  • Park K.H.;Kim T.S.;Kim K.H.;Hyun D.S.
    • Proceedings of the KIPE Conference
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    • 2003.07b
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    • pp.663-666
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    • 2003
  • This paper presents a speed controller method based on the disturbance torque observer of high performance brushless DC (BLDC) motor drives. In case of the speed control of robot arms and tracking applications with lower stiffness, we cannot design the speed controller gain to be very large from tile viewpoint of the system stability. Thus, the feedforward compensator using disturbance torque observer was proposed. This method can improve the speed characteristic without increasing the speed controller gain. The enhanced speed control performance can be achieved and the speed response against the disturbance torque can be Improved for high-performance BLDC motor drive systems in which the bandwidth of tile speed controller cannot be made large enough. Consequently, speed control for high-performance BLDC motor drives become improved. The simulation results for BLDC motor drive systems confirm the validity of the proposed method.

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