• Journal of Power Electronics
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• v.16 no.5
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• pp.1689-1697
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• 2016

Continuous conduction mode (CCM) boost converters are commonly used in home appliances and various industries because of their simple topology and low input current ripples. However, these converters suffer from several disadvantages, such as hard switching of the active switch and reverse recovery problems of the output diode. These disadvantages increase voltage stresses across the switch and output diode and thus contribute to switching losses and electromagnetic interference. A new topology is presented in this work to improve the switching characteristics of CCM boost converters. Zero-current turn-on and zero-voltage turn-off are achieved for the active switches. The reverse-recovery current is reduced by soft turning-off the output diode. In addition, an input current sensorless control is applied to the proposed topology by pre-calculating the duty cycles of the active switches. Power factor correction is thus achieved with less effort than that required in the traditional method. Simulation and experimental results verify the soft-switching characteristics of the proposed topology and the effectiveness of the proposed input current sensorless control.

• Journal of Communications and Networks
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• v.13 no.2
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• pp.160-166
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• 2011

In u-healthcare services based on wireless body sensor networks, reliable connection is very important as many types of information, including vital signals, are transmitted through the networks. The transmit power requirements are very stringent in the case of in-body networks for implant communication. Furthermore, the wireless link in an in-body environment has a high degree of path loss (e.g., the path loss exponent is around 6.2 for deep tissue). Because of such inherently bad settings of the communication nodes, a multi-hop network topology is preferred in order to meet the transmit power requirements and to increase the battery lifetime of sensor nodes. This will ensure that the live body of a patient receiving the healthcare service has a reduced level of specific absorption ratio (SAR) when exposed to long-lasting radiation. We propose an efficientmethod for delivering delay-intolerant data packets over multiple hops. We consider forward error correction (FEC) in an erasure correction mode and develop a mathematical formulation for packet-level scheduling of delay-intolerant FEC packets over multiple hops. The proposed method can be used as a simple guideline for applications to setting up a topology for a medical body sensor network of each individual patient, which is connected to a remote server for u-healthcare service applications.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.352-357
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• 2003

A new single stage power factor correction(PFC) AC/DC converter based on zero voltage switching(ZVS) full bridge topology is proposed. Since the series-connected two transformers act as both output inductor and main transformer by turns, the proposed converter has a wide ZVS range without additional devices for ZVS. Furthermore, since there is no need to use an output inductor, the proposed converter features high power density. The proposed converter gives the good power factor correction and low line current harmonics distortion. A mode analysis and experiment results are presented to verify the validity of the proposed converter.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.10
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• pp.501-507
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• 2001

In this paper, new high-efficiency zero voltage switching (ZVS) AC-DC boost converter is proposed to achieve power factor correction by simplifing energy recovery circuit. A lot of high power factor correction circuits have been proposed and applied to increase input power factor and efficiency. Most of these circuits may obtain unity power factor and achieve sinusoidal current waveform with zero voltage or/and zero current switching. However, it is difficult for them to obtain low cost, small size, low weight, and low noise. The topology proposed to improve these problems can compact the devices in circuit and can achieve high efficiency ZVS AC-DC boost converter. Simulation and experimental results show that this topology is capable of obtaining high power factor and increasing the efficiency of the system.

• Proceedings of the KIEE Conference
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• 2001.04a
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• pp.227-230
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• 2001

This paper deals with a bidirectional ac-dc converter used in ups system application. We propose a Voltage-Source-Charge-Pump-Power-Factor-Correction(VS-CPPFC) ac-dc converters. First of all, we propose a charge pump power-factor-correction converter. Secondly, we derive and analyse a unity power factor condition. The proposed topology is based on a half-bridge for the primary and a current-fed push pull for the secondary side of a high frequency isolation transformer. The advantage of bidirectional flow of power achieved by using the same power components is that the circuit is simple and efficient. And the galvanically isolated topology is specially attractive in battery charge/discharge circuits in ups system. We design equivalent model for the steady-state circuit and analyse operation waveforms for each mode. We show that the proposed model can be applied to ups system by simulation processes.

• Journal of Biomedical Engineering Research
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• v.26 no.2
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• pp.73-86
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• 2005

We need to flatten the brain cortex to smooth surface, sphere, or 2D plane in order to view the buried sulci. The rendered 3D surface of the segmented white matter and gray matter does not have the topology of a sphere due to the partial volume effect and segmentation error. A surface without correct topology may lead to incorrect interpretation of local structural relationships and prevent cortical unfolding. Although some algorithms try to correct topology, they require heavy computation and fail to follow the deep and narrow sulci. This paper proposes a method that corrects topology of the rendered surface fast, accurately, and automatically. The proposed method removes fractions beside the main surface, fills cavities in the inside of the main surface, and removes handles in the surface. The proposed method to remove handles has three-step approach. Step 1 performs smoothing operation on the rendered surface. In Step 2, vertices of sphere are gradually deformed to the smoothed surfaces and finally to the boundary of the segmented white matter and gray matter. The Step 2 uses multi-resolutional approach to prevent the deep sulci from geometrical intersection. In Step 3, 3D binary image is constructed from the deformed sphere of Step 2 and 3D surface is regenerated from the 3D binary image to remove intersection that may happen. The experimental results show that the topology is corrected while principle sulci and gyri are preserved and the computation amount is acceptable.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.6
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• pp.510-516
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• 2007

The proposed method offers an improved control method for high power density AC/DC adapter by using more energy efficient electrical equipments. Power factor correction (PFC) topology is based on boost topology with boundary conduction mode (BCM). DC/DC topology is based on half-bridge topology with fixed 50% duty and newly introduced off-time control method, which helps to reduce size of the semiconductor and the magnetic devices. Test results with 85W AC/DC adapter (18.5V/4.6A) design show that the measured efficiency is 90% with power density of $36W/in^3$. It also shows low no load power consumption of about 0.5W.

• Journal of Power Electronics
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• v.11 no.3
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• pp.264-270
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• 2011

In this paper a novel passive snubber is proposed, which can suppress the voltage spike across the bridge leg of the isolated full-bridge boost topology. The snubber is composed of capacitors, inductors and diodes. Two capacitors connected in series are used to absorb the voltage spike and the energy of each capacitor can be transferred to the load during one switching cycle by the resonance of the inductors and capacitors. The operational principle of the passive snubber is analyzed in detail based on a three-phase power factor correction (PFC) converter, and the design considerations of both the converter and the snubber are given. Finally, a 3kW laboratory-made prototype is built. The experimental results verify the theoretical analysis and evaluations. They also prove the validity and feasibility of the proposed methods.

• Journal of Power Electronics
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• v.13 no.1
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• pp.40-50
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• 2013

In this paper, a new zero-voltage-switching, high power-factor, bridgeless rectifier is introduced. In this topology, an auxiliary circuit provides soft switching for all of the power semiconductor devices. Thus the switching losses are reduced and the highest efficiency can be achieved. The proposed converter has been analyzed and a design procedure has been introduced. The control circuit for the converter has also been developed. Based on the given approach, a 250 W, 400 Vdc prototype converters has been designed at 100 kHz for universal input voltage (90-264 Vrms) applications. A maximum efficiency of 94.6% and a power factor correction over 0.99 has been achieved. The simulation and experimental results confirm the design procedure and highlight the advantages of the proposed topology.

• Journal of Power Electronics
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• v.15 no.2
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• pp.356-365
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• 2015

This paper presents a new single phase front-end ac-dc bridgeless power factor correction (PFC) rectifier topology. The proposed converter achieves a high efficiency over a wide range of input and output voltages, a high power factor, low line current harmonics and both step up and step down voltage conversions. This topology is based on a non-inverting buck-boost (Zeta) converter. In this approach, the input diode bridge is removed and a maximum of one diode conducts in a complete switching period. This reduces the conduction losses and the thermal stresses on the switches when compare to existing PFC topologies. Inherent power factor correction is achieved by operating the converter in the discontinuous conduction mode (DCM) which leads to a simplified control circuit. The characteristics of the proposed design, principles of operation, steady state operation analysis, and control structure are described in this paper. An experimental prototype has been built to demonstrate the feasibility of the new converter. Simulation and experimental results are provided to verify the improved power quality at the AC mains and the lower conduction losses of the converter.