• Journal of Navigation and Port Research
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• v.36 no.5
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• pp.371-378
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• 2012

This paper presents a timing recovery method using Gardner TED (Timing Error Detector) with a Peak Detector using Parabola Peak Interpolation in underwater acoustic communication. This method will have an eye to improve phase converge speed of timing recovery and reduced amount of Tx data. The OQPSK(Offset Quadrature Phase Shift Keying) modulation technique was considered. The proposed algorithm has faster recovery speed and more accurate than Gardner TED because the sampling values in the proposed algorithm are moved persistingly to maximum or minimum point using parabolic peak interpolation. when simulation performed using Preposed method, it improved BER (Bit Error Rate) performance about 23% And to evaluate the performances of the proposed algorithm the sea trial was performed in the Korean East Sea. And distance of a transmitter-receiver is 3 km each other. As a result, the proposed algorithm outperforms better BER performance about 20% of timing recovery than the Gardner method. Also Proposed method improved converge speed of timing recovery about 1.4 times better than Gardner method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.6A
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• pp.685-692
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• 2008

In this paper, we propose a timing recovery loop for Inmarsat mini-m system downlink receiver. Inmarsat mini-m system requires a timing recovery loop which is robust in frequency offset and has fast acquisition because Inmarsat mini-m system specification requires frequency tolerance is required of ${\pm}924$ Hz (signal bandwidth: 2.4 kHz) and acquisition time of UW (Unique Word) signal duration (15ms).Therefore, we propose a timing recovery loop which is suitable for Inmarsat mini-m system. The proposed timing recovery loop adopted noncoherent UW detector and differential ELD which applied differential UW signal for stability and fast acquisition in frequency offset environment. Simulation results show that the proposed timing recovery loop has stable operation and fast acquisition in frequency offset environment for the system.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.77-80
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• 1999

This paper deals with a design of a symbol timing recovery circuit of QAM using the interpolation in AWGN channel. To reduce timing jitter and the amount of processing data, we employ MGA (Modified Gardner Algorithm) as a symbol timing error detector which is called NDA(Nondecision Directed Algorithm). We show the characteristics (S-curve and the variance) of timing error detector with the roll-off factor of a shaping filter, which are compared with GA. Also, we compare the BER curve of interpolation method with that of ideal case. The performance of the STR is shown to be close to that of ideal case. This result shows that this method can be useful to implement symbol timing recovery circuit for multi-level modulation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.7
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• pp.545-551
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• 2013

Timing recovery loop composed of the Timing Error Detector(TED), loop filter and resampler is widely used for the timing synchronization in MQASK receivers. Since TED is sensitive to the delay between the symbol period of the signal and sampling period, the output is averaged out when the symbol rate and sampling rate are quite different the recovery loop cannot work at all. This paper presents a sampling frequency discriminator (SRD), which detects the frequency offset of the sampling clock to the symbol clock of the MQASK data transmitted. Employing the SRD, the closed loop timing recovery scheme performs the frequency-aided timing acquisition and achieve the synchronization at extremely high sampling frequency offset, which can be used in variable symbol rate MQASK receivers.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.1C
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• pp.40-44
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• 2010

The timing error detector(TED) employed in the closed loop type timing synchronization scheme for an MQASK all digital receiver suffers from the selfnoise-induced timing jitter. To eliminate the timing jitter a prefilter can be added in front of the TED. The prefilter method, however, degrades the stability and timing acquisition performance due to the loop delay and increases the complexity of the synchronizer. This paper proposes a polyphase filter type resampler approach to optimize the performance and architecture of the synchronizer simultaneously. The proposed scheme uses two resamplers which performs matched filtering and matched prefiltering so that the loop delay is minimized with minimal hardware resources. Simulation results showed an excellent acquisition performance with reduced timing jitter.

• Journal of IKEEE
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• v.8 no.1 s.14
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• pp.12-21
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• 2004

Error control is one of major concerns in many electronic systems. Experience shows that most malfunctions during system operation are caused by transient faults, which often mean abnormal signal delays that may result in violations of circuit element timing constraints. This paper presents a novel CMOS-based concurrent timing error detector that makes a flip-flop to sense and then signal whether its data has been potentially corrupted or not by a setup or hold timing violation. Designed circuit performs a quiescent supply current evaluation to determine timing violation from the input changes in relation to a clock edge. If the input is too close to the clock time, the resulting switching transient current in the detection circuit exceeds a reference threshold at the instant of the clock transition and an error is flagged. The circuit is designed with a $0.25{\mu}m$ standard CMOS technology at a 2.5 V supply voltage. The validity and effectiveness are verified through the HSPICE simulation. The simulation results in this paper shows that designed circuit can be used to detect setup and hold time violations effectively in clocked circuit element.

• Journal of the Korean Institute of Telematics and Electronics
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• v.20 no.4
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• pp.55-60
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• 1983

A new type of digital phase-locked loop (DPLL) that employs a multilevel quantified timing error detector (TED) is proposed and analyzed under the assumption of negligible quantizing effect and no noise. Since the timing error is quantized uniformly, the TED has a linear characteristic. From the linear characteristic of TED, a first order difference equation describing the behavior of the loop is derived. Using the system equation, the loop is analyzed mathematically for phase step and frequency step input. Desired locking condition for the loop to be locked and the lock range for the DPLL's to achieve exact locking independently of initial conditions are ob-tained. And these analyses are confirmed by timing error plane plots and computer simulation.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.5
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• pp.45-53
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• 2007

To recover transmitted signal perfectly at DTV receiver, we have to acquire carrier frequency synchronization to compensate pilot signal which located in wrong position and rotated phase. Also, we need a symbol timing synchronization to compensate sampling timing error. Conventionally, to synchronize symbol timing, we use Gardner's scheme which used in multi-level signal. Gardner's scheme is well known for its sampling the timing error signal from every symbol and it makes easy to detect and keep timing sync in multi-path channel. In this paper, to discuss the problem when the received power level is out of range and we cannot get synchronization information. With this problem, we use 2 step procedures. First, we put a received signal power compensation block before Garder's timing error detector. Second, adaptive loop filter to get a fast synchronization information and averaging loop filter's output value to reduce the amount of jitter after synchronization in PLL(Phased Locked Loop) circuit which is used to get a carrier frequency synchronization and symbol timing synchronization. Using the averaging value, we can estimate offset. Based on offset changing ratio, we can adapt adaptive loop filter to carrier frequency and symbol timing synchronization circuit.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.1
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• pp.98-105
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• 2007

In this paper, we propose a timing detector using suboptimal maximum likelihood method. The proposed method has an simple reference signal generator. Additionally, timing detector's gain of the proposed method is the same to Early-Late gate and ML method. We reveal that tracking range of time tracker is narrow because of using data-decision, that is, tracking range is ${\pm}0.06ns$ for the 4-order Gaussian monocycle with 0.7ns pulse width. Therefore we can find that searcher must have very accurate acquisition procedure. When estimating a performance of time tracker, we consider a jitter in transmitter and receiver's pulse generation process as well as background noise. By using computer simulation, we propose mean/variance of timing detector and tracking process. Also we consider a mobility in tracking process, i.e., timing error modeled ramp function. In order to propose a performance of time tracker, we consider only one correlation demodulator.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.1
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• pp.47-55
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• 1994

This paper investigates the performance analysis of the packet DS/SS receiver with a PJED(phase-jump error detector) using the block signal processing(BSP) methods. The conventional packet DS/SS block receiver has a high probability of mistaking the phase-jump detection, which causes the frequency estimation error. The conventional receiver uses a Matched-Pulse Timing Extractor which has a complicated structure. The proposed packet DS/SS block receiver with the PJED which uses libearity of the phase has little probability of mistaking the phase-jump detection. The proposed Matched Pulse Timing Extractor gas the more simple structure but obtains the same performance on the exact matched-pluse timing as the conventional one does. The simulation results show that the proposed receiver gives about 2dB improvement in the BER compared with the conventional receiver.