• ETRI Journal
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• v.30 no.3
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• pp.421-431
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• 2008

In this paper, we offer a new technique to discover frequent spatiotemporal patterns from a moving object database. Though the search space for spatiotemporal knowledge is extremely challenging, imposing spatial and timing constraints on moving sequences makes the computation feasible. The proposed technique includes two algorithms, AllMOP and MaxMOP, to find all frequent patterns and maximal patterns, respectively. In addition, to support the service provider in sending information to a user in a push-driven manner, we propose a rule-based location prediction technique to predict the future location of the user. The idea is to employ the algorithm AllMOP to discover the frequent movement patterns in the user's historical movements, from which frequent movement rules are generated. These rules are then used to estimate the future location of the user. The performance is assessed with respect to precision and recall. The proposed techniques could be quite efficiently applied in a location-based service (LBS) system in which diverse types of data are integrated to support a variety of LBSs.

• Journal of KIISE:Computer Systems and Theory
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• v.29 no.6
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• pp.354-360
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• 2002

Delay estimation must be simple and efficient, since millions or more delay calculations may be required during a timing-driven placement stage. We have developed a new Modified Elmore delay estimation method, which is significantly more accurate than the original Elmore delay by considering resistance shielding effects, but has the same order of complexity with that of Elmore delay. Experimental results show that the suggested technique can significantly reduce the error in estimated delay, from 31.6 ~ 145.2% to 2.5 ~ 22.7%.

• Progress in Superconductivity
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• v.6 no.1
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• pp.7-12
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• 2004

Due to the very fast switching speed of Josephson junctions, superconductive digital circuit has been a very good candidate fur future electronic devices. High-speed and Low-power microprocessor can be developed with Josephson junctions. As a part of an effort to develop superconductive microprocessor, we have designed an RSFQ 4-bit ALU (Arithmetic Logic Unit) in a pipelined structure. To make the circuit work faster, we used a forward clocking scheme. This required a careful design of timing between clock and data pulses in ALU. The RSFQ 1-bit block of ALU used in this work consisted of three DC current driven SFQ switches and a half-adder. We successfully tested the half adder cell at clock frequency up to 20 GHz. The switches were commutating output ports of the half adder to produce AND, OR, XOR, or ADD functions. For a high-speed test, we attached switches at the input ports to control the high-speed input data by low-frequency pattern generators. The output in this measurement was an eye-diagram. Using this setup, 1-bit block of ALU was successfully tested up to 40 GHz. An RSFQ 4-bit ALU was fabricated and tested. The circuit worked at 5 GHz. The circuit size of the 4-bit ALU was 3 mm ${\times}$ 1.5 mm, fitting in a 5 mm ${\times}$ 5 mm chip.

• The Journal of Korea Robotics Society
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• v.13 no.2
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• pp.103-112
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• 2018

In this paper, a high performance underwater vehicle which can be manufactured at low cost is designed and fabricated, and its performance is verified through experiments. To improve efficiency, the Myring equation is used to design the appearance and the duct structure including the thruster is planned to increase the propulsion efficiency while reducing the drag force. Through various methods, it is secured stable waterproof performance, and also is devised to have high speed movement and turning performance. The developed underwater vehicle is equipped with a high output BLDC motor to achieve a linear speed of up to 2 m/s and can change direction rapidly with stability through four rudders. The rudders are driven by coupling a timing belt and a pulley by extending the axis of a servo motor, and are equipped at the end of the body to turn heading. In addition, for stable posture control, the roll keeps its internal center of gravity low and maintains its stability due to restoring force. By controlling the four rudders, pitch and yaw are handled by the PID controller and show stable performance. To investigate the horizontal turning performance, it is confirmed that the yaw rate controller is designed and stable yaw rate control is performed.

• International Journal of Air-Conditioning and Refrigeration
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• v.16 no.4
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• pp.124-129
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• 2008

Design practice has been made on an oil-less scroll air compressor as an air supply device for a 2 kW fuel cell system where air pressure of 2 bar and flow rate of 120 liter/min are required. Basic structure of the scroll compressor includes double-sided scroll wrap for the orbiting scroll driven by two crankshafts connected to each other by a timing belt. These features can eliminate thrust surface which otherwise would produce frictional heat and jeopardize reliable operation of the orbiting scroll and the scroll element's deformation as well. This study focuses on optimum scroll wrap design; orbiting radius has been chosen as an independent design parameter. As the orbiting radius changes, scroll sizes such as scroll base plate and discharge port diameters change accordingly. Gas compression-related losses and mechanical loss also change with the orbiting radius. With a scroll base plate diameter of 120mm at most and discharge port of at least 10mm, the orbiting radius should be within the range of 2.5-4.0mm. With this range of the orbiting radius, it was estimated by performance analysis that the compressor efficiency reached to a maximum of ${\eta}_c$=96% at the orbiting radius of $r_s$=3.5mm for the scroll wrap height-to-thickness ratio of h/t=5.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.12 no.12
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• pp.5654-5668
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• 2018

Driven by security and real-time demands of Internet of Things (IoT), the timing of fog computing and edge computing have gradually come into place. Gateways bear more nearby computing, storage, analysis and as an intelligent broker of the whole computing lifecycle in between local devices and the remote cloud. In fog computing, the edge broker requires X-aware capabilities that combines software programmability, stream processing, hardware optimization and various connectivity to deal with such as security, data abstraction, network latency, service classification and workload allocation strategy. The prosperous of Field Programmable Gate Array (FPGA) pushes the possibility of gateway capabilities further landed. In this paper, we propose a software-defined gateway (SDG) scheme for fog computing paradigm termed as Fog Computing Zero-Knowledge Gateway that strengthens data protection and resilience merits designed for industrial internet of things or highly privacy concerned hybrid cloud scenarios. It is a proxy for fog nodes and able to integrate with existing commodity gateways. The contribution is that it converts Privacy-Enhancing Technologies rules into provable statements without knowing original sensitive data and guarantees privacy rules applied to the sensitive data before being propagated while preventing potential leakage threats. Some logical functions can be offloaded to any programmable micro-controller embedded to achieve higher computing efficiency.

• Atmosphere
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• v.23 no.2
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• pp.131-141
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• 2013

Many studies have related the recent variations of wildfire regime such as the increasing number of occurrances, their patterns and timing changes, and the severity of their extreme cases with global warming. However, there are only a few numbers of wildfire studies to assess how the future wildfire regime will change in the interactions between land and atmosphere with climate change especially over East Asia. This study was performed to estimate the future changing aspect of wildfire danger with global warming, using Haines Index (HI). Calculated from atmospheric instability and dryness, HI is the potential of an existing fire to become a dangerous wildfire. Using the Weather Research and Forecasting (WRF) model, two separated 5-year simulations of current (1995~1999) and far future (2095~2099) were performed and analyzed. Community Climate System Model 3 (CCSM3) model outputs were utilized for the model inputs for the past and future over East Asia; future prediction was driven under the IPCC A1B scenario. The results indicate changes of the wildfire danger regime, showing overall decreasing the wildfire danger in the future but intensified regional deviations between north and south. The overall changes of the wildfire regime seems to stem from atmospheric dryness which is sensitive to soil moisture variation. In some locations, the future wildfire danger overall decreases in summer but increases in winter or fall when the actual fire occurrence are generally peaked especially in South China.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.73-76
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• 2010

A two-facet approach was used to investigate the parametric performance of functional high-speed DDR3 (Double Data Rate) DRAM (Dynamic Random Access Memory) die placed in different types of BGA (Ball Grid Array) packages: wire-bonded BGA (FBGA, Fine Ball Grid Array), flip-chip (FCBGA) and lead-bonded $microBGA^{(R)}$. In the first section, packaged live DDR3 die were tested using automatic test equipment using high-resolution shmoo plots. It was found that the best timing and voltage margin was obtained using the lead-bonded microBGA, followed by the wire-bonded FBGA with the FCBGA exhibiting the worst performance of the three types tested. In particular the flip-chip packaged devices exhibited reduced operating voltage margin. In the second part of this work a test system was designed and constructed to mimic the electrical environment of the data bus in a PC's CPU-Memory subsystem that used a single DIMM (Dual In Line Memory Module) socket in point-to-point and point-to-two-point configurations. The emulation system was used to examine signal integrity for system-level operation at speeds in excess of 6 Gb/pin/sec in order to assess the frequency extensibility of the signal-carrying path of the microBGA considered for future high-speed DRAM packaging. The analyzed signal path was driven from either end of the data bus by a GaAs laser driver capable of operation beyond 10 GHz. Eye diagrams were measured using a high speed sampling oscilloscope with a pulse generator providing a pseudo-random bit sequence stimulus for the laser drivers. The memory controller was emulated using a circuit implemented on a BGA interposer employing the laser driver while the active DRAM was modeled using the same type of laser driver mounted to the DIMM module. A custom silicon loading die was designed and fabricated and placed into the microBGA packages that were attached to an instrumented DIMM module. It was found that 6.6 Gb/sec/pin operation appears feasible in both point to point and point to two point configurations when the input capacitance is limited to 2pF.

• The Transactions of the Korea Information Processing Society
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• v.3 no.1
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• pp.118-126
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• 1996

Memory hierarchy is a useful mechanism for improving the memory access speed and making the program space larger by layering the memories and separating program spaces from memory spaces. However, it needs at least two memory accesses for each data reference : a TLB(Translation Lookaside Buffer) access for the address translation and a data cache access for the desired data. If the cache size increases to the multiplication of page size and the cache associativity, it is difficult to access the TLB with the cache in parallel, thereby making longer the critical timing path in the processor. To achieve such parallel accesses, we present the hybrid mapped TLB which combines a direct mapped TLB with a very small fully-associative mapped TLB. The former can reduce the TLB access time. while the latter removes the conflict misses from the former. The trace-driven simulation shows that under given workloads the proposed TLB is effective even when a fully-associative mapped TLB with only four entries is added because the effects of its increased misses are offset by its speed benefits.

• Journal of Korea Society of Industrial Information Systems
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• v.19 no.3
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• pp.31-39
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• 2014

In KSLV-I launch mission, real-time data from the tracking stations are acquired, processed and distributed by the Mission Control System to the user group who needed to monitor processed data for safety and flight monitoring purposes. The processed trajectory data by the mission control system is sent to each tracking system for target designation in case of tracking failure. Also, the processed data are used for decision making for flight termination when anomalies occur during flight of the launch vehicle. In this paper, we propose the processing mechanism of slaving data which plays a key role of launch vehicle tracking mission. The best position data is selected by predefined logic and current status after every available position data are acquired and pre-processed. And, the slaving data is distributed to each tracking stations through time delay is compensated by extrapolation. For the accurate processing, operation timing of every procesing modules are triggered by time-tick signal(25ms period) which is driven from UTC(Universial Time Coordinates) time. To evaluate the proposed method, we compared slaving data to the position data which received by tracking radar. The experiments show the average difference value is below 0.01 degree.