• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.3
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• pp.61-72
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• 2002

In this paper, we propose two timing-driven routing algorithms for single-source net and multi-source net as applications of 1-Steiner heuristic algorithm. Using the method of substituting the cost of 1-Steiner heuristic algorithms with interconnection delay, our routing algorithms can route both single-source net and multi-source net which have all critical source-terminal pairs or one critical pair efficiently Our single-source net routing algorithm reduced the average maximum interconnection delay by up to 2.1% as compared with previous single-source routing algorithm, SERT, and 10.6% as compared with SERT-C. and Our multi-source net routing algorithm increased the average maximum interconnection delay by up to 2.7% as compared with MCMD A-tree, but outperforms it by up to average 1.4% when the signal net has only subset of critical node pairs.

• Journal of Energy Engineering
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• v.26 no.2
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• pp.32-38
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• 2017

The common rail diesel engine used in this study uses mechanically driven camshaft for the operation of intake and exhaust valves, and the timing of valve opening and closing is fixed according to the operating conditions of the vehicle. However, the electric generator engine operates at a constant speed and partial load. Therefore, in order to optimize the design of common rail diesel engine for power generation, the characteristics of diesel combustion and emissions according to the change of valve timing were examined and calculated in terms of fuel economy. The valve timing of the diesel engine influenced the combustion characteristics by changing the intake and exhaust flow and it was considered that the fuel efficiency of the generator could be improved.

• Journal of the Korean Society for Precision Engineering
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• v.25 no.9
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• pp.53-58
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• 2008

The traditional engine valve train in a combustion engine is the mechanically driven camshaft system that provides one-fixed valve timing. The variable valve timing (VVT), however, is highly required to achieve the significant improvement in fuel economy. To achieve VVT in combustion engine, the solenoid type of actuator had been developed in past years, but it requires current in all operation period, the starting is difficult and the efficiency is low. In this paper, a new linear actuator using permanent magnet (PM) is proposed and verified its feasibility by finite element (FE) analysis.

• Journal of Mechanical Science and Technology
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• v.19 no.5
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• pp.1194-1205
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• 2005

The common-rail injection systems, as a new diesel injection system for passenger car, have more degrees of freedom in controlling both the injection timing and injection rate with the high pressure. In this study, a piezo-driven injector was applied to a high pressure common-rail type fuel injection system for the control capability of the high pressure injector's needle and firstly examined the piezo-electric characteristics of a piezo-driven injector. Also in order to analyze the effect of injector's needle response driven by different driving method on the injection, we investigated the diesel spray characteristics in a constant volume chamber pressurized by nitrogen gas for two injectors, a solenoid-driven injector and a piezo-driven injector, both equipped with the same injection nozzle with sac type and 5-injection hole. The experimental method for spray visualization was based on back-light photography technique by utilizing a high speed framing camera. The macroscopic spray propagation was geometrically measured and characterized in term of the spray tip penetration, spray cone angle and spray tip speed. For the evaluation of the needle response of the above two injectors, we indirectly estimated the needle's behavior with an accelerometer and injection rate measurement employing Bosch's method was conducted. The experimental results show that the spray tip penetrations of piezo­driven injector were longer, on the whole, than that of the solenoid-driven injector. Besides we found that the piezo-driven injector have a higher injection flow rate by a fast needle response and it was possible to control the injection rate slope in piezo-driven injector by altering the induced current.

• Transactions of the Korean Society of Automotive Engineers
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• v.21 no.2
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• pp.17-25
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• 2013

Performance of DI diesel engine with high fuel injection method is directly related to the emission characteristics and fuel consumption. At present, diesel injection system with piezo element is replacing conventional solenoid type due to their faster electro-mechanical properties. In this study, it was investigated the sensitivity characteristics regarding internal hydraulic modeling based on the AMESim environment of piezo-driven injector The analytic parameter for this study defined such as In/Out orifice, injection hole's diameter and driven voltage on piezo stack. As the results, it was shown that these parameter influence on a fast response characteristics of piezo-driven injector. Also we found fuel pressure recovery time is faster about 0.1 ms due to larger IN orifice diameter. And larger OUT orifice diameter occurs maximum pressure drop with faster its timing of about 0.2 ms.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.4
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• pp.21-29
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• 1998

As silicon geometry shrinks into deep submicron and the operating speed icreases, higher accuracy is required in the analysis of the propagation delays of the gates and interconnects in an ASIC. In this paper, the driving characteristics of a CMOS gate is represented by a gatedriver model, consisting of a linear resistor $R_{dr}$ and an independent ramp voltage source $V_{dr}$ . We drivered $R_{dr}$ and $V_{dr}$ as the functions of the timing data representing gate driving capability and an effective capacitance $C_{eff}$ reflecting resistance shielding effect by interconnet circuits. Through iterative applications of these equations and AWE algorithm, $R_{dr}$ , $V_{dr}$ and $C_{eff}$ are comuted simulataneously. then, the gate delay is decided by $C_{eff}$ and the interconnect circuit delay is determined by $R_{dr}$ and $V_{dr}$ . this process has been implemented as an ASIC timing analysis program written in C language and four real circuits were analyzed. In all cases, we found less than 5% of errors for both of gate andinterconnect circuit delays with a speedup factor ranging from a few tens to a few hundreds, compared to SPICE.SPICE.

• Journal of Electrical Engineering and information Science
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• v.2 no.5
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• pp.89-99
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• 1997

The application for real-time database systems must satisfy timing constraints. Typically the timing constraints are expressed in the form of deadlines which are represented by priorities to e used by schedulers. In any real-time applications, since the system maintains sensitive information to be shared by multiple users with different levels of security clearance, security is another important requirement. As more advanced database systems are being used in applications that need to support timeliness while managing sensitive information, protocols that satisfy both requirements need to be developed. In this appear, we proposed a new priority-driven secure multiversion locking (PSMVL) protocol for real-time secure database systems. The schedules produced by PSMVL are proven to e one-copy serializable. We have also shown tat the protocol eliminates covert channels and priority inversions. The details of the protocol, including the compatibility matrix and the version selection algorithms are presented. the results of the performance comparisons of our protocol with other protocols are described.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.325-328
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• 2002

In this paper, we present a SystemC model of a 32-Bit RISC core wi)ich is based on the ARMTTDMI architecture. The RISC core model was first modeled in C for architecture verification and then refined down to a level that allows concurrent behavior lot hardware timing using the SystcmC class library. It was driven in timed functional level that uses handshake protocol. It was compiled using standard C++ compiler. The functional simulation result was verified by comparing the contents of memory, the result of execution with the result from the ARMulator of ADS(Arm Developer Suite).

• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.339-342
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• 2003

An PIAGP generator for TFT-LCD production has been proposed in this paper. The proposed generator was implemented using careful control of timing controller signals using a FPGA. The generator displays successfully the intended pattern sequence(REDlongrightarrowGREENlongrightarrowBLUElongrightarrowWHITElongrightarrowBLACK) and the result are demonstrated at the conference site. The advantage of the use of the proposed generator is the simplification of production equipments and the pattern generator.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.5
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• pp.387-397
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• 1991

This paper presents the design and implementation of a performance-driven logic synthesis system that automatically generates circuits satisfying the given timing and fanout constraints in minimal silicon area. After performing technology independent and dependent optimization, the system identifies and resynthesizes the gates with large loading delay due to excessive fanouts to eliminate the critical path. Experimental results for MCNC benchmark circuits show that proposed system generates the circuits with less delay by up to 20%.