• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1016-1021
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• 2003

The overall size of electronic product is becoming small according to development of technology. Accordingly it is difficult to inspect these small components by human eyes. So, an automation system for inspecting them has been used. The existing system put microprocessor or Programmable Logic Controller (PLC) use. The structure of microprocessor-based controller and PLC use basically composed of memory devices such as ROM, RAM and I/O ports. Accordingly, the system is not only becomes complicated and enlarged but also higher price. In this paper, we implement FPGA-based One-chip Programmable Timing Controller for Inspecting Small components to resolve above problems and design the high performance controller by using VHDL. With fast development, the FPGA of high capacity that can have memory and PLL have been introduced. By using the high-capacity FPGA, the peripherals of the existent controller, such as memory, I/O ports can be implemented in one FPGA. By doing this, because the complicated system can be simplified, the noise and power dissipation problems can be minimized and it can have the advantage in price. Since the proposed controller is organized to have internal register, counter, and software routines for generating timing signals, users do not have to problem the details about timing signals and need to only send some values about an inspection system through an RS232C port. By selecting theses values appropriate for a given inspection system, desired timing signals can be generated.

• Nuclear Engineering and Technology
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• v.29 no.2
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• pp.167-174
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• 1997

The method that the operating condition of Control Rod Drive Mechanism (CRDM) can be monitored without mounting sensors within CRDM housing was developed, and by using this developed method the closed-loop controller for the CRDM was designed which can optimize the performance and maximize the reliability of CRDM operation. Neural network is utilized as pattern recognition engine in detecting CRDM actuation. In this paper, most problems in previous open loop system are resolved. The control algorithms for closed-loop system ore developed and implemented within the hardware of timing controller based on microprocessor. All functions in the timing controller ore verified by means of real time CRDM simulator. The results show that the timing controller performs its intended functions properly.

• Proceedings of the KIEE Conference
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• 1995.07b
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• pp.761-765
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• 1995

The old Timing Controller for Control Element Drive Mechanism (CEDM) is designed as an open loop control system because it is difficult to mount sensors within the Control Element Drive Mechanism(CEDM) which is operating under the pressure boundary of the reactor vessel. In this work new method which can be used to detect the CEDM operational conditions without mounting sensors within the CEDM housing is developed in order to resolve problems of the old Timing Controller. By using the developed new method, the new Timing Controller for the CEDM is designed as a closed loop controller which has features of the control rod drop prevention, fine position control and the coil life time extension. The algorithm developed under closed loop control concept resolves most problems occurred in the old Timing Controller and improves the performance and reliability of the system. During designing and testing of the Timing Controller algorithm, the real time CEDM simulator developed here was used. And all functions of the developed algorithm were verified using CEDM simulator with the real data collected from the site. The results show that the Timing Controller performs its intended functions properly.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.674-676
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• 2008

An electrostatic discharge (ESD) or a noise supplied from the outside has an effect on communication between the timing controller (TCON) and the memory element (EEPROM) through the interface between the timing controller and the memory element in liquid crystal displays (LCD). Therefore, we must apply ESD protection methods to LCD operating circuits for a normal operation. Our ESD protection circuit is to prevent from bi-directional communication errors between TCON and EEPROM due to an electrostatic discharge (ESD).

• International Journal of Automotive Technology
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• v.8 no.5
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• pp.555-562
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• 2007

The Variable Valve Timing(VVT) system for high performance is a key technology used in newly developed engines. The system realizes higher torque, better fuel economy, and lower emissions by allowing an additional degree of freedom in valve timing during engine operation. In this study, a model-based control method is proposed to enable a fast and precise VVT control system that is robust with respect to manufacturing tolerances and aging. The VVT system is modeled by a third-order nonlinear state equation intended to account for nonlinearities of the system. Based on the model, a controller is designed for position control of the VVT system. The sliding mode theory is applied to controller design to overcome model uncertainties and unknown disturbances. The experimental results suggest that the proposed sliding mode controller is capable of improving tracking performance. In addition, the sliding mode controller is robust to battery voltage disturbance.

• Transactions of the Korean Society of Automotive Engineers
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• v.5 no.5
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• pp.37-50
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• 1997

The objective of this paper is to study on the idle speed control using the fuzzy logic controller under load disturbance. The design procedure for fuzzy logic controller depends on the expert's knowledge or trial and error. The inputs of the fuzzy controller are error of rpm and variation of rpm. The output of the fuzzy controller is an ISC motor step and ignition timing. The airflow is controlled by the ISC motor movement and the idle speed is controlled by the airflow control and ignition timing control. During the control, air to fuel was checked by LAMBDA sensor. All experiments were performed in a real vehicle.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.468-472
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• 2004

In this paper a VLSI design for the automatic magnetizing system has been presented. This is the design of a peripheral controller, which magnetizes CRTs and computers monitors and controls the automatic inspection system. We implemented a programmable peripheral interface(PPI) circuit of the control and protocol module for the magnetizer controller by using a O.8um CMOS SOG(Sea of Gate) technology of ETRI. Most of the PPI functions has been confirmed. In the conventional method, the propagation/ramp delay model was used to predict the delay of cells, but used to model on only a single cell. Later, a modified "apos;Linear delay predict model"apos; was suggested in the LODECAP(LOgic Design Capture) by adding some factors to the prior model. But this has not a full model on the delay chain. In this paper a new "apos;delay predict equationapos;" for the design of the timing control block in PPI system has been suggested. We have described the detail method on a design of delay chain block according to the extracted equation and applied this method to the timing control block design.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.15 no.6
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• pp.71-77
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• 2015

In this paper, we propose a scheduling method for signal measurement and control algorithm execution in a multi-motor drive controller. The multi-motor controller which is used for vehicle control receives position/velocity command and performs position/velocity control and current control. Internal resource allocation and control algorithm execution timing are very important when one microcontroller is used for multi-motor drives. The control performance of the velocity control system is verified by varying ADC(Analog to Digital Converter) conversion timing and algorithm execution timing using real experiments.

• Journal of Positioning, Navigation, and Timing
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• v.2 no.1
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• pp.67-74
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• 2013

In this study, a remote controller was designed using localization technique. The designed remote controller system consists of infrared transmit/receive module for time synchronization, ultrasonic transmit/receive module for measuring the TOA value, and micro-controller for processing the measured data value. For the position estimation method of remote controller, the Savarese method was used which does not have a problem of diverging solution depending on initial value. The noise included in the measured value was removed by separating the signal and noise with the use of EMD method which is the non-stationary signal analysis technique. The designed system was tested by constructing a simulation environment, and the improvement of accuracy and precision for the application of EMD method was examined.

• Journal of IKEEE
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• v.17 no.2
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• pp.168-175
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• 2013

The delay times due to the propagating of data on PCB depend on the shape and length of interconnection lines when memory controllers and high speed memories are soldered on the PCB. The dependency on the placement and routing on the PCB requires redesign of I/O logic or reconfiguration of the memory controller after the delay time is measured if the controller is programmable. In this paper, we propose architecture of configuring logic for the delay time estimation by writing and reading test patterns while initializing the memories. The configuration logic writes test patterns to the memory and reads them by changing timing until the correct patterns are read. The timing information is stored and the configuration logic configures the memory controller at the end of initialization. The proposed method enables easy design of systems using PCB by solving the problem of the mismatching caused by the variation of placement and routing of components including memories and memory controllers. The proposed method can be applied to high speed SRAM, DRAM, and flash memory.