• Journal of KIISE:Computer Systems and Theory
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• v.27 no.2
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• pp.216-226
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• 2000

This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a deterministic signal transition graph specification with timing constraints. First, a timing analysis extracts the timed concurrency and timed causality relations between any two signal transitions. Then, a hazard-free implementation under the timing constraints is synthesized by constructing a precedence graph and finding paths in the graph. The major result of this work is that the method does not suffer from the state explosion problem, achieves significant reductions in synthesis time, and generates circuits that have nearly the same area as compared to previous methods.

• International Journal of Contents
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• v.6 no.3
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• pp.19-24
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• 2010

Task scheduling is an integrated component of computing with the emergence of grid computing. In this paper, we address two different task scheduling models, which are static Round-Robin (RR) and dynamic Fastest Site First (FSF) task scheduling method, using extended timed marked graphs, which is a special case of Stochastic Petri Nets (SPN). Stochastic reward nets (SRN) is an extension of SPN and provides compact modeling facilities for system analysis. We build hierarchical SRN models to compare two task scheduling methods. The upper level model simulates task scheduling and the lower level model implements task serving process for different sites with multiple servers. We compare these two models and analyze their performances by giving reward measures in SRN.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.14 no.3
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• pp.197-206
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• 1989

In this paper, we represent an improved algorithm of performance evaluation for communication protocol. It is an algorithm that analyzes Extended Timed Perti Net models including time which have been successfully used to model and evaluate the performance of distributed system. While Timed Petri Nets generally limted to free-choice and safe nets, our algorithm permits the construnction of elegant models of restricted concurrent processing. Furthermore, to reduce the state space size of Timed Reachability Graph, we improve the algorithm by using Maximum Firing Rule and sets of simultaneously firing transitions. Procedures for constructing of Timed Reachability Graphs and analyzing are presented, and we demonstrate the usefulness of this algorithm by applying it to the analysis of the communication protocol.

• Journal of Korea Multimedia Society
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• v.3 no.1
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• pp.77-90
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• 2000

Real-Time verification is a procedure that verifies the correctness of specification related to requirement in time as well as in logic. One serious problem encountered in the verification task is that the state space grows exponentially owing to the unboundedness of time, which is termed the state space explosion problem. In this paper, we propose a real-time verification technique checking the correctness of specification by showing that a system model described in timed automata is equivalent to the characteristic of system property specified in timed modal-mu calculus. For this, we propose a local model checking method based on the value of the formula in initial state with constructing product graph concerned to only the nodes needed for verification process. Since this method does not search for every state of system model, the state space is reduced drastically so that the proposed method can be applied effectively to real-time system verification.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.636-638
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• 2010

Task scheduling is an integral part of parallel and distributed computing. Extensive research has been conducted in this area leading to significant theoretical and practical results. Stochastic reward nets (SRN) is an extension of stochastic Petri nets and provides compact modeling facilities for system analysis. In this paper, we address task scheduling model using extended timed marked graph, which is a special case of SRNs. And we analyze this model by giving reward measures in SRN.

• The KIPS Transactions:PartD
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• v.16D no.3
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• pp.339-352
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• 2009

There are a number of formal methods for distributed real-time systems in ubiquitous computing to analyze and verify the behavioral, temporal and the spatial properties of the systems. However most of the methods reveal structural and fundamental limitations of complexity due to mixture of spatial and behavioral representations. Further temporal specification makes the complexity more complicate. In order to overcome the limitations, this paper presents a new formal method, called Timed Calculus of Abstract Real-Time Distribution, Mobility and Interaction(t-CARDMI). t-CARDMI separates spatial representation from behavioral representation to simplify the complexity. Further temporal specification is permitted only in the behavioral representation to make the complexity less complicate. The distinctive features of the temporal properties in t-CARDMI include waiting time, execution time, deadline, timeout action, periodic action, etc. both in movement and interaction behaviors. For analysis and verification of spatial and temporal properties of the systems in specification, t-CARDMI presents Timed Action Graph (TAG), where the spatial and temporal properties are visually represented in a two-dimensional diagram with the pictorial distribution of movements and interactions. t-CARDMI can be considered to be one of the most innovative formal methods in distributed real-time systems in ubiquitous computing to specify, analyze and verify the spatial, behavioral and the temporal properties of the systems very efficiently and effectively. The paper presents the formal syntax and semantics of t-CARDMI with a tool, called SAVE, for a ubiquitous healthcare application.

• Journal of Korea Multimedia Society
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• v.2 no.2
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• pp.200-216
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• 1999

In this paper, we propose a BTPN (Beta-distributed Timed Petri Net) model which is not only an effective multimedia synchronization and authoring specification model, but also a direct control model for playout of a title. Methods of specification of relationships among all media objects in a title by using the BTPN structure and language, as well as methods of analysis of the BTPN by means of a Remaining Timed Reachability Graph and Timing diagram, are proposed. A concept of critical object path, coming from PERT/CPM, is useful for modeling the uncertainty of playout of a multimedia title and editing of title.

• Journal of KIISE:Information Networking
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• v.27 no.4
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• pp.482-488
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• 2000

프로토콜 검증에 있어서 reachability analysis를 사용하는 방법은 널리 알려지고 많이 사용되는 방법이다. Reachability analysis를 통한 검증 방법에 있어서는 프로토콜의 동작을 나타내는 reachability graph의 생성이 중요하다. 그러나 시간이 관련되는 경우 발생하는 상태 수 폭증또는 시간의 실수적 성질의 문제가 있어서 reachability graph의 생성에 큰 장애가 되어왔다. 실시간 시스템이나 프로토콜에 있어서 타이머는 대기 시간의 한계를 지정하거나 일정한 시간간격을 시스템에 알릴 수 있도록 하는 등 시간의 상대적 기준점으로 사용되며 이외에도 여러 가지 용도로 타이머를 사용하게 되어 프로토콜을 모델링하는데 있어서 타이머는 불가결하다. 본 논문에서는 타이머를 모델링하지 못하며 통신 프로토콜과 그 환경을 모델링하는데 적절치 못하던 기존의 방법과 달리 타이머를 포함하며 통신 프로토콜과 그환경을 적절히 표현할 수 있도록 시스템을 기술하는 방법과 함께 상대적 시간 개념으로 천이와 타이머를 다루는 방법을 통해서 시간개념과 타이머가 들어있는 프로토콜의 reachability graph를 유도하는 방법을 제안하였다. 제안한 방법을 통해서 기존방법으로는 찾아낼수 없었던 시스템의 오류를 찾아낼 수 있었다. 이를 통해 보다 실제 프로토콜에 가깝에 모델링하고 검증할 수 있는 기반을 마련하고 있다.

• The KIPS Transactions:PartA
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• v.9A no.1
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• pp.61-74
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• 2002

This paper presents a method which synthesizes asynchronous circuits from free-choice Signal Transition Graphs (STGs) with timing constraints. The proposed method synthesizes asynchronous circuits by analyzing: the relations between signal transitions directly from the STGs without generating state graphs. The synthesis procedure decomposes a free-choice STG into deterministic STGs which do not have choice behavior. Then, a timing analysis extracts the timed concurrency and tamed causality relations between any two signal transitions for each deterministic STG. The synthesis procedure synthesizes circuits for each deterministic STG and synthesizes the final circuit by merging the circuits for each deterministic STG. The experimental results show that our method achieves significant reductions in synthesis time for the circuits which have a large state space, and generates circuits that have nearly the same area as compared to previous methods.

• Journal of Korea Society of Industrial Information Systems
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• v.4 no.1
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• pp.1-6
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• 1999

This paper is on the analysis for the real-time software requirement. This method can be used for TNPN(Timed Numerical Peri Net) as a easy communication means with real-users. It is based on the RTTL(Real Time Temporal Logic) for correctness the system. TNPN is used to represent a behavior specification language, the validity of specified behaviors in TNPN is expressed in RTTL, and analyzed through the teachability graph. Thus, the requirement between user and system is satisfied Using the example of shared track, the validity of the property of real-time(safetiness, responsiveness, liveness, priority) is verified. Also this framework if given to connection with a object, natually.