• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.12
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• pp.2736-2743
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• 1997

In this paper, the extended finite difference time domain(FDTD) algorithm is applied to carry out full-wave analysis of a microwave amplifier circuit. The active device included in the amplifier is modeled by equivalent current sources. Equivalent current sources are characterizing interaction between electronmagnetic waves and active devices and can be directly incorporated into the FDTD algorithm. To confirm this analysis, an amplifier is implemented. The FDTD simulation shows good agreement with measured results.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2006.05a
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• pp.407-409
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• 2006

This paper presents the methods of designing the control circuits for a Class D amplifier to have a peak performance. The proposed approach is based on the three functional components - a carrier generator, a feedback circuit and a dead-time circuit. First the analog signal is applied to the controller, which outputs the 3 level PWM waveform. The controller used for this experiment is made of the operational amplifier and the logic circuit. The experimental results show that the control circuit performs with satisfaction and its output is proportional to input audio signal, providing a satisfactory 3 level PWM pattern. From this design methodology, by implementing a proposed control circuit we can achieve the efficient Class D amplifier using the half-bridge, full-bridge or push-pull topology at the output stage.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.4
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• pp.25-35
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• 2002

This work describes an 8b 200MHz time-interleaved subranging analog-to-digital converter (ADC) based on a single-poly digital CMOS process. Two fine ADCs for lower digital bits of the proposed ADC employ a time-sharing double-channel architecture to increase system speed and a new reference voltage switching scheme to reduce settling time of the reference voltages and chip area. The proposed intermeshed resistor string, which generates reference voltages for fine ADCs, improves linearity and settling time of the reference voltages simultaneously. The proposed sample- and-hold amplifier(SHA) is based on a highly linear common-drain amplifier and passive differential circuits to minimize power consumption and chip area with 8b accuracy and employs input dynamic common mode feedback circuits for high dynamic performance at a 200MHz sampling rate. A new encoding circuit in a coarse ADC simplifies the signal processing between the coarse ADC and two successive fine ADCs.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.10
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• pp.998-1004
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• 2002

This paper reports a design of feedforward linear power amplifier using pilot tone for IMT-2000 band repeaters accepting multi-carrier. As this time pilot tone is applied to the circuit differently from the existing method. Only one pilot tone is used in both 1-st loop(IMD abstraction loop) and 2-nd loop(IMD cancellation loop) to cancell IMD signals automatically according to variation of frequency or power level of input signals. As an experiment, in range of 2110 MHz - 2170 MHz at LPA output power of $20 W_{avg}$, IMD characteristics of over 20 dB was improved maintaining below -60 dBc considering respective 20 MHz. Therefore the supposed feedforward linear power amplifier can be used for linear power amplifier in IMT-2000 band repeaters.

• Journal of Electrical Engineering and information Science
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• v.2 no.6
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• pp.197-201
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• 1997

To realize 10-Gbit/s optical transmission systems, we designed and fabricated a limiting amplifier with extremely high operation frequencies over 10-GHz using AlGaAs/GaAs heterojunction bipolar transistors (HBTs), and investigated their performances. Circuit design and simulation were performed using SPICE and LABRA. A discrete AlGaAs/GaAs HBT with the emitter area of 1.5${\times}$10$\mu\textrm{m}$$^2$, used for the circuit fabrication, exhibited the cutoff frequency of 63GHz and maximum oscillation frequency of 50GHz. After fabrication of MMICs, we observed the very wide bandwidth of DC∼15GHz for a limiting amplifier from the on-wafer measurement. Ceramic-packaged limiting amplifier showed the excellent eye opening, the output voltage swing of 750mV\ulcorner, and the rise/fall time of 40ps, measured at the data rates of 10-Gbit/s.

• Transactions on Electrical and Electronic Materials
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• v.2 no.4
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• pp.1-6
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• 2001

In this paper, a 1.5 V high-gain high-frequency CMOS complementary operational amplifier is presented. The input stage of op-amp is designed for supporting the constant transconductance on the Input stage by consisting of the parallel-connected rail-to-rail complementary differential pairs. And consisting of the class-AB rail-to-rail output stage using the concept of elementary shunt stage and the grounded-gate cascode compensation technique for improving the low PSRR which was a disadvantage in the general CMOS complementary input stage, the load dependence of open loop gain and the stability of op- amp on the output load are improved, and the high-gain high-frequency operation can be achieved. The designed op-amp operates perfectly on the complementary mode with the 180° phase conversion for a 1.5 V supply voltage, and shows the DC open loop gain of 84 dB, the phase margin of 65°, and the unity gain frequency of 20 MHz. In addition, the amplifier shows the 0.1 % settling time of .179 ㎲ for the positive step and 0.154 ㎲ for the negative step on the 100 mV small-signal step, respectively, and shows the total power dissipation of 8.93 mW.

• Journal of Sensor Science and Technology
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• v.31 no.2
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• pp.120-124
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• 2022

With advancements in underwater stealth technology for naval vessels, new sensor configurations for detecting targets have been attracting increased attention. Latest underwater mines adopt multiple sensor configurations that include electric field sensors to detect targets and to help acquire accurate ignition time. An underwater electric field sensor consists of a pair of electrodes, signal processing unit, and preamplifier. For detecting underwater electric fields, the preamplifier requires low-noise amplification at ultra-low frequency bands. In this paper, the specific requirements for low-noise preamplifiers are discussed along with the experimental results of various setups of matched transistors and chopper stabilized operational amplifiers. The results showed that noise characteristics at ultra-low frequency bands were affected significantly by the voltage noise density of the chopper amplifier and the number of matched transistors used for differential amplification. The fabricated preamplifier was operated within normal design parameters, which was verified by testing its gain, phase, and linearity.

• The Journal of the Korea institute of electronic communication sciences
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• v.15 no.3
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• pp.421-432
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• 2020

This paper proposes a 2-kW solid-state power amplifier (SSPA) developed by employing power amplifier pallets designed using gallium-nitride high electron mobility transistors, which is used in S-band military radars and to replace existing traveling-wave tube amplifier (TWTA). The SSPA consists of a high-power amplifier module, which combines eight power amplifier pallets, a drive amplifier module, a digital control module, and a power supply unit. First, the amplifier module and component were integrated into a small package to account for space limitations; next, an on-board harmonic filter was fabricated to reject spurious components; and finally, an auto gain control system was designed for various duty ratios because recent military radar systems are all active phase radars using the pulse operation mode. The developed SSPA exhibited a max gain of 48 dB and an output power ranging between 63-63.6 dBm at a frequency band of 3.1 to 3.5 GHz. The auto gain control function showed that the output power is regulated around 63 dBm despite the fluctuation of the input power from 15-20 dBm. Finally, reliability of the developed system was verified through a temperature environment test for nine hours at high (55 ℃) / low (-40℃) temperature profile in accordance with military standard 810. The developed SSPA show better performance such as light weight, high output, high gain, various safety function, low repair cost and short repair time than existing TWTA.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.9
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• pp.444-453
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• 2017

This paper proposes an operational algorithm for a Photovoltaic Power-Hardware-In-Loop Simulator that is designed to improve the control algorithm and reliability of the PV Inverter. There was an instability problem in the PV PHILS with the conventional algorithm when it was connected tothe PV inverter. Initially, a real-time based computing unit with mathematical modeling of the PV array is implemented and a DC amplifier and an isolated device for DC power measurement are integrated. Several experiments were performed based on theabove concept undercertain conditions, which showed that the proposed algorithm is more effective for the PV characteristic test and grid evaluation test than the conventional method.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.401-406
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• 2004

In this paper, a new time-domain adaptive predistortion scheme is proposed to compensate for the nonlinearity of high power amplifiers (HPA) in OFDM systems. A complex Wiener-Hammerstein model (WHM) is adopted to describe the input-output relationship of unknown HPA with linear dynamics, and a power series model with memory (PSMWM) is used to approximate the HPA expressed by WHM. By using the PSMWM, the compensation input to HPA is calculated in a real-time manner so that the linearization from the predistorter input to the HPA output can be attained even if the nonlinear input-output relation of HPA is uncertain and changeable. In numerical example, the effectiveness of the proposed method is confirmed and compared with the identification method based on PSMWM.