• Title/Summary/Keyword: Time graph

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Shared Spatio-temporal Attention Convolution Optimization Network for Traffic Prediction

  • Pengcheng, Li;Changjiu, Ke;Hongyu, Tu;Houbing, Zhang;Xu, Zhang
    • Journal of Information Processing Systems
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    • v.19 no.1
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    • pp.130-138
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    • 2023
  • The traffic flow in an urban area is affected by the date, weather, and regional traffic flow. The existing methods are weak to model the dynamic road network features, which results in inadequate long-term prediction performance. To solve the problems regarding insufficient capacity for dynamic modeling of road network structures and insufficient mining of dynamic spatio-temporal features. In this study, we propose a novel traffic flow prediction framework called shared spatio-temporal attention convolution optimization network (SSTACON). The shared spatio-temporal attention convolution layer shares a spatio-temporal attention structure, that is designed to extract dynamic spatio-temporal features from historical traffic conditions. Subsequently, the graph optimization module is used to model the dynamic road network structure. The experimental evaluation conducted on two datasets shows that the proposed method outperforms state-of-the-art methods at all time intervals.

Verification of Logic Gate Interconnection (논리회로 상호간의 연결도 검증)

  • Jung, Ja Choon;Kyung, Chong Min
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.24 no.2
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    • pp.338-346
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    • 1987
  • This paper describes a method for verifying whether a given geometrical layout correcdtly reflects the original logic level description. The logic description extracted from layout data was directly compadred with the original logic diagram generated at logic level design stage where the logic diagram is represented as a weighted multi-place graph. The comparison is based on graph isomorphism and error messages(error categories and locations)are invoked if any difference is found between the two logic descriptions. An efficient partitioning algorithm which consists of two steps, candidate selection and equal weight partitioning procedure, enables the entire verification process to occur in O(n log n) time.

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Development of a CAE Middleware and a Visualization System for Supporting Interoperability of Continuous CAE Analysis Data (연속해석 데이터의 상호운용성을 지원하는 CAE 미들웨어와 가시화 시스템의 개발)

  • Song, In-Ho;Yang, Jeong-Sam;Jo, Hyun-Jei;Choi, Sang-Su
    • Korean Journal of Computational Design and Engineering
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    • v.15 no.2
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    • pp.85-93
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    • 2010
  • This paper proposes a CAE data translation and visualization technique that can verify time-varying continuous analysis simulation in a virtual reality (VR) environment. In previous research, the use of CAE analysis data has been problematic because of the lack of any interactive simulation controls for visualizing continuous simulation data. Moreover, the research on post-processing methods for real-time verification of CAE analysis data has not been sufficient. We therefore propose a scene graph based visualization method and a post-processing method for supporting interoperability of continuous CAE analysis data. These methods can continuously visualize static analysis data independently of any timeline; it can also continuously visualize dynamic analysis data that varies in relation to the timeline. The visualization system for continuous simulation data, which includes a CAE middleware that interfaces with various formats of CAE analysis data as well as functions for visualizing continuous simulation data and operational functions, enables users to verify simulation results with more realistic scenes. We also use the system to do a performance evaluation with regard to the visualization of continuous simulation data.

A Case Study on Learning of Fundamental Idea of Calculus in Constant Acceleration Movement (등가속도 운동에서 미적분의 기본 아이디어 학습 과정에 관한 사례연구)

  • Shin Eun-Ju
    • Journal of Educational Research in Mathematics
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    • v.16 no.1
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    • pp.59-78
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    • 2006
  • As a theoretical background for this research, the literatures which focus on the rationale of teaching and learning of connecting with mathematics and science in calculus were investigated. And teaching and learning material of connecting with mathematics and science in calculus was developed. And then, based on the case study using this material, the research questions were analyzed in depth. Students could understand mean-velocity, instant-velocity, and acceleration in the experimenting process of constant acceleration movement. Also Students could understand fundamental ideas that instant-velocity means slope of the tangent line at one point on the time-displacement graph and rate of distance change means rate of area change under a time-velocity graph.

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Implementation of Scheduling Strategies on PC Clusters (PC 클러스터에서 스케줄링 기법의 구현)

  • Kang Oh-Han;Song Hee-Heon;Chung Joong-Soo
    • The KIPS Transactions:PartA
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    • v.11A no.7 s.91
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    • pp.521-528
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    • 2004
  • In this-paper, we propose a new task scheduling scheme for bus-based cluster architectures and analyze performance of the scheduling scheme which has been implemented in a PC cluster. The implemented scheme schedules the tasks of a task graph to the processors of a PC cluster, and it reduces parallel execution time by selectively duplicating critical tasks using heuristic. Experimental results show that the proposed scheduling scheme produces better parallel execution time than the other scheduling scheme.

A Study on a Lane Detection Using Eccentricity (Eccentricity를 이용한 차선 검출에 관한 연구)

  • Jeong, Tae-Il;Arshad, Nasim;Moon, Kwang-Seok;Kim, Jong-Nam
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.12
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    • pp.2755-2761
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    • 2012
  • In this paper, a lane detection algorithm using Eccentricity calculation is proposed. Lane detection is used for lane departure warning which can support safe driving to prevent accidents. In other to enhance the detection rate, we define the Eccentricity calculation which is introduced in graph theory, and evaluate the Eccentricity. The Eccentricity for any straight line is equal to 1, hence computing the Eccentricity allows the implementation of a first order equation. As a results of simulation, we confirmed that the proposed algorithm was enhanced by time and space complexity, and superior to the performance of the conventional lane detections.

The study on the Straightness forms of STD-11 Die-hole in wire-cut Electronic Discharge Machining Conditions (와이어 컷 방전가공 조건에 따른 STD-11 Die-hole 가공시 진직정밀도 고찰)

  • 조규재;김선진
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2000.05a
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    • pp.739-742
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    • 2000
  • From the experimental study of W-EDM for alloyed steel, the characteristics such as Hand Drum Form and surface roughness have been observed and evaluated for various conditions. In square hole, the increase of If as to made condition the calculate high value of surface roughness. Also compare dimensionless square hole with circle hole' graph. In circle hole, if a value of surface roughness IP 6 in a side of circle it show a 0.4${\mu}{\textrm}{m}$ and in IP 8, 0.6${\mu}{\textrm}{m}$, in IP 10, 0.7${\mu}{\textrm}{m}$, in IP 12. 0.8${\mu}{\textrm}{m}$ higher than before. This figure show the surface roughness is higher than before, because a table move in either X-axis or Y-axis in square hole, on the contrary, in circle there table move in X-axis and Y-axis at the same time. hand drum form getting small when wire tension increase 1000gf to 1500gf, at the same working conditions. the smaller of off time, the mailer of hand drum form in same condition and same wire tension. but if you compare square hole with circle hole' graph hand drum form displayed in maintained term of working condision, on the contrary, in case of square hole variation of hand drum form is more increase than a grow of IP

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Hand drum forms of STD-11 Die-hole in Wire-cut Electronic discharge Machining Conditions (STD-11 Die-hole 와이어 컷 방전가공시 가공조건에 따른 북현상 고찰)

  • 조규재
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2000.04a
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    • pp.567-572
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    • 2000
  • From the experimental study of W-EDM for alloyed steel, the characteristics such as Hand Drum Form and surface roughness have been observed and evaluated for various conditions. In square hole, the increase of IP as to made condition, the calculate high value of surface roughness. Also compare dimensionless square hole with circle hole' graph, In circle hole, if a value of surface roughness IP 6 in a side of circle it show a 0.4${\mu}{\textrm}{m}$ and in IP 8, 0.6${\mu}{\textrm}{m}$, in IP 10, 0.7${\mu}{\textrm}{m}$, in IP 12, 0.8${\mu}{\textrm}{m}$ higher than before. This figure show the surface roughness is higher than before, because a table move in either X-axis or Y-axis in square hole, on the contrary, in circle there table move in X-axis and Y-axis at the same time. hand drum form getting small when wire tension increase 1000gf to 1500gf, at the same working conditions. The smaller of off time, the maller of hand drum form in same condition and same wire tension. but if you compare square hole with circle hole' graph, hand drum form displayed in maintained term of working condision, on the contrary, in case of square hole variation of hand drum form is more increase than a grow of IP

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Source to teminal reliability evaluation by network decomposition (분할에 의한 네트워크의 국간신뢰도 계산)

  • 서희종;최종수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.2
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    • pp.375-382
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    • 1996
  • In this paper, aneffective method for computing source to terminal reliability of network by decomposition is described. A graph is modeled after a network, and decomposed into two subgraphs. A logic product term of one subgraph is computed, and a graph of the other subgraphs is made according to the event representing the logic product term, and it's logic product term is compted. By multiplying the logic product term of one subgraph by that of the other subgraphs, a method for computing the source to terminal reliability is proposed. the time complexity for computing all the logic product terms of one subgraph is the product of copies of the number of edges in the subgraph of 2, and that of the other subgraph is the number of edges multiplied by the number of logic product terms. This method requires less computation time than that not by decomposition.

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A Dynamic Delaunay Triangulation in the L(L1) Metric (L(L1) 동적 디루니 삼각분할 방법)

  • Wee, Youngcheul;Kimn, Hajine;Seo, Sangku
    • Journal of the Korea Computer Graphics Society
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    • v.6 no.4
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    • pp.23-28
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    • 2000
  • We introduce a new method for constructing a dynamic Delaunay triangulation for a set S of n sites in the plane under the $L_{\infty}(L_1)$ metric. We find that the quadrant neighbor graph is contained in the Delaunay triangluation and that at least one edge of each triangle in the Delaunay triangulation is contained in the quadrant neighbor graph. By using these observations and employing a range tree scheme, we present a method that dynamically maintains the $L_{\infty}(L_1)$ Delaunay triangulation under insertions and deletions in $O(log^2n)$ amortized time and O(log n) expected time.

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