• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.932-934
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• 2003

For the insulator of inorganic thin film electroluminescent (TFEL), devices AlON combined with TiON was used and it exhibits higher luminance than AlON as well as $Al_{2}O_{3}$ insulator. Furthermore, using AlON with TiON film show better stability and higher luminance than that with $TiO_{2}$ grown by conventional atomic layer deposition (ALD) for the application of the insulator of ZnS:Mn TFEL device.

• Journal of the Korean Vacuum Society
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• v.9 no.3
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• pp.263-266
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• 2000

This paper is focused on the fabrication of reliable Al/$TiO_2-SiO_2$/Mo antifuse, which could operate at low voltage along with the improvement in on/off state properties. Mo metal as the bottom electrode had smooth surface and high melting point, and was being kept as-deposited $SiO_2$film stable. The breakdown voltage of TiO_2-SiO_2$ stacked antifuse was better than that of same-thickness (100 $\AA$) $SiO_2$antifuse because of Ti diffusion in $SiO_2$. The improving breakdown-voltage and on-resistance can be obtained as well as the influence of hillock in the bottom metal is reduced by using double insulator. Low on-resistance (65 $\Omega$) and low programming voltage (9.0 V) can be obtained in these antifuses with 250 $\AA$ double insulator.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.7
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• pp.72-78
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• 1998

This paper is focused on the fabrication of reliable novel antifuse, which could operate at low voltage along with the improvement in OFF and ON-state properties. The fabricated antifuse consists of Al/BaTi$_{2}$O$_{3}$/SiO$_{2}$/TiW-silicide structure. Through the systematic analyses for bottom metal and the intermetallic insulator, material and electri cproperties were investiaged. TiW-silicide as the bottom electrode had smooth surface with average roughness of 11.angs. at 10X10.mu.m$^{2}$ and was bing kept as-deposited SiO$_{2}$ film stable. Amorphous BaTi$_{2}$O$_{3}$ film as the another insulator was chosen because of its low breakdown strength (2.5MV/cm). breakdown voltage of antifuse is remarkably reduced by using BaTi$_{2}$O$_{3}$ film, and leakage current of that maintained low level due to the SiO$_{2}$ film. Low ON-resistance (46.ohm./.mu.m$^{2}$) and low programming voltage(9.1V) can be obtained in theses antifuses with 220.angs. double insulator layer and 19.6X10$^{-6}$ cm$^{2}$ area, while keeping sufficient OFF-state reliability (less than 1nA).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.93-94
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• 2006

나노급 CMOS 기술에서 high-k 물질을 이용하여 게이트 유전막을 형성하고자 하는 연구가 활발히 진행되고 있다. 본 논문에서는 high-k 물질인 $TiO_2$의 특성에 대한 연구를 수행하였다. $TiO_2$를 APCVD법으로 p-type 실리콘 기판에 $50{\AA}{\sim}300{\AA}$ 두께로 증착하였고, evaporator를 이용하여 $TiO_2$ 박막위에 Al을 증착하여 MIS소자를 제작하였다. 두께를 가변 하여 Capacitance-Voltage (C-V) 특성을 측정, 분석하였다.

• Journal of the Korean Ceramic Society
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• v.37 no.11
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• pp.1051-1057
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• 2000

TiO$_2$와 CeO$_2$박막을 Si 위에 증착한 후 MOCVD법에 의해 PbTiO$_3$박막을 증착하여 MFIS 구조를 형성하였다. 절연층의 후열처리가 절연층 및 MFIS 구조의 전기적 특성에 미치는 영향을 관찰하기 위해 산소분위기와 $600^{\circ}C$~90$0^{\circ}C$의 온도범위에서 후 열처리를 행하였고, C-V 특성 및 누설전류 특성을 분석하였다. CeO$_2$와 TiO$_2$박막의 유전상수는 증착 직후 6.9와 15였으며, 90$0^{\circ}C$ 열처리를 행한 후 약 4.9와 8.8로 감소하였다. 누설전류밀도 역시 증착 직후 각각 7$\times$$10^{-5}$ A/$ extrm{cm}^2$와 2.5$\times$$10^{-5}$ A/$\textrm{cm}^2$에서 90$0^{\circ}C$ 열처리를 거친 후에 약 4$\times$$10^{-8}$ A/$\textrm{cm}^2$와 4$\times$$10^{-9}$ A/$\textrm{cm}^2$로 감소하였다. Ellipsometry 시뮬레이션을 통해 계산된 계면층의 두께는 90$0^{\circ}C$에서 약 115$\AA$(CeO$_2$) 및 140$\AA$(TiO$_2$)까지 증가하였다. 계면층은 MFIS 구조에서 강유전층에 인가되는 전계를 감소시켜 항전계를 증가시켰고, charge injection을 방지하여 Al/PbTiO$_3$/CeO$_2$(90$0^{\circ}C$, $O_2$)/Si 구조의 경우 $\pm$2 V~$\pm$10 V의 측정범위에서 memory window가 계속 증가하는 것을 보여주었다.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.11a
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• pp.69-72
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• 2002

B $i_{3.3}$L $a_{0.7}$ $Ti_3$ $O_{12}$(BLT) 강유전체 박막을 $Al_2$ $O_3$/Si 기판위에 졸-겔(sol-gel)법으로 스핀 코팅하여 Metal-Ferroelectric-Insulator-Silicon (MFIS) 구조를 형성하였다. 박막의 결정화를 위해 as-coated 박막을 산소분위기에서 $650^{\circ}C$ 및 $700^{\circ}C$에서 30분 동안 후속열처리를 실시하였다. BLT 박막의 열처리 온도를 $650^{\circ}C$에서 $700^{\circ}C$로 증가시킴에 따라서 c축으로 우선 배향되는 경향을 보였으며, FWHM 값이 감소하여 결정성이 향상됨을 확인할 수 있었다. $700^{\circ}C$에서 열처리된 BLT 박막의 memory window는 약 2.5V (인가전압 5V)를 나타내었으며, 누설전류는 약 1.5x$10^{-7}$ A/$\textrm{cm}^2$를 나타내었다.다.다.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1061-1064
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• 2003

In this paper, we deposited A1$_2$O$_3$ thin film using atomic layer deposition(ALD) method on Ti and fabricated metal-insulator-metal(MIM) capacitor. In the result of this study, the typical deposition rate was about 1.12$\AA$/cycle. About 30 nm of Ti was consumed during deposition and TiO$_{x}$ was formed at the interface of A1$_2$O$_3$ and Ti. Its surface roughness was 1.54nm. The leakage current density was 1.5 nA/$\textrm{cm}^2$. The temperature coefficient of capacitance(TCC) of MIM capacitor was 41 ppm/$^{\circ}C$ at 1MHz and 100 ppm/$^{\circ}C$ at 100 kHz.z.

• Journal of Sensor Science and Technology
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• v.4 no.3
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• pp.80-88
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• 1995

This paper presents the fabrication of a metal-insulator-metal(MIM) antifuse structure consisting of insulators sandwiched between top electrode, Al, and bottom electrode, TiW and additionally studies on antifuse properties depending on the condition of insulator. The intermetallic insulators, prepared by means of sputter, comprised of silicon oxide and tantalum oxide. In such an antifuse structure, silicon oxide layer is utilized to decrease the leakage current and tantalum oxide layer, of which the dielectric strength is lower than that of silicon oxide, is also utilized to lower the breakdown voltage near 10V. Finally sufficient low leakage current, below 1nA, and low programming voltage, about 9V, could be obtained in antifuse device comprising $Al/Ta_{2}O_{5}(10nm)/SiO_{2}(10nm)/TiW$ structure and OFF resistance of 3$3.65M{\Omega}$ and ON resistance of $7.26{\Omega}$ could be also obtained. This $Ta_{2}O_{5}/SiO_{2}$ based antifuse structures will be promising for highly reliable programmable device.

• Proceedings of the Materials Research Society of Korea Conference
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• 2007.11a
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• pp.22.2-22.2
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• 2007

• Journal of the Korean Magnetics Society
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• v.15 no.6
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• pp.311-314
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• 2005

We investigated the composition dependence of the tunneling magnetoresistance (TMR) behavior and the stability of the magnetic tunnel junctions (MTJs) with TiAlOx barrier and the microstructural evolution of TiAl alloy films. The TMR ratio increased up to $49\%$ at $5.33\;at\%$ Ti. In addition, a significant tunneling magnetoresistance (TMR) value of $20\%$ was maintained after annealing at $450^{\circ}C$, and the breakdown voltage ($V_B$) of and 1.35 V were obtained in the MTJ with $5.33\;at\%$ Ti-alloyed AlOx barrier. These results were closely related to the enhanced quality of the barrier material microstructure in the pre-oxidation state. Ti alloying enhanced the barrier/electrode interface uniformity and reduced microstructural defects. These structural improvements enhanced not only the TMR effect but also the thermal and electrical stability of the MTJs.