• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.14-19
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• 2011

We have fabricated GaN Schottky barrier diode (SBD) for high-voltage applications on Si substrate. The leakage current and the electrical characteristics of GaN SBD are investigated by annealing metal-semiconductor junctions. Ohmic junctions of Ti/Al/Mo/Au and Schottky junctions of Ni/Au are used in the fabrication. A test structure is proposed to measured buffer leakage current through a mesa structure. When annealing temperature is increased from $700^{\circ}C$ to $800^{\circ}C$, measured buffer leakage current is also increased from 87 nA to 780 nA at the width of 100 ${\mu}m$. The diffusion of Au, Ti, Mo, O into GaN buffer layer increases the leakage current and that is verified by Auger electron spectroscopy. Experimental results show that the low leakage current and the high breakdown voltage of GaN SBD are achieved by annealing metal-semiconductor junctions.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.9
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• pp.6221-6226
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• 2015

In this paper, waveguide analysis was interpreted as an optical waveguide using the feedback perturbation method simple and easy to apply compared to the analysis method, while the other almost identical to the numerical calculation method. In addition, efficient coupling with an optical transmission line of optical fiber and the waveguide form the thin film of different functional elements is required in order to achieve the full optical communication system. However, problems arise, such as the light field (field) and the decrease of the access efficiency due to inconsistency in the distribution characteristics of the connection surface by the difference in size of the cross section thereof when connecting the optical fiber and the waveguide directly to the combination of a thin film. Therefore propose a new type of connector structure to increase the efficiency of the connection when connecting the optical fiber waveguide and the thin film was analyzed by applying a coupled mode theory, the binding efficiency of the modified contactor. And by diffusing Ti on the $LiNbO_3$ substrate and a wide range of applications in the manufacture of integrated optical material made of a current low-loss Ti: $LiNbO_3$ optical waveguide and making the Y-branch waveguide, and the properties were confirmed.

• Journal of the Korean Chemical Society
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• v.39 no.5
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• pp.364-370
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• 1995

The catalytic oxidations of several olefins in $CH_2Cl_2$ have been investigated using non-redox metalloporphyrin (M=Ga(III), In(III), Tl(III)) complexes as catalyst and sodium hypochlorite as terminal oxidant. Porphyrins were $(p-CH_3O)TPP,\;(p-CH_3)TPP,\;TPP,\;(p-F)TPP,\;(p-Cl)TPP\;and\;(F_20)TPP$ (TPP=tetraphenylporphyrin), and olefins were $(p-CH_3O)-,\;(p-CH_3)-,\;(p-H)-,\;(p-F)-,\;(p-Cl)-\;and\;(p-Br)styrene$styrene and cyclopentene and cyclohexene. The substrate conversion yield was discussed according to the substituent effects of metalloporphyrin and substrate, and the radius effect of non-redox metal ion. The conversion yield of substrate by changing the substituent of TPP increased in the order of $p-CH_3O$ < $p-CH_3$ < H < p-F < p-Cl, which was consistent with the sequence of $4{\sigma}$ values of TPP. But the substituent effect of substrate on the conversion yield decreased with increasing the ${\sigma}^+$ values on substrates in the order of p-CH3O > p-CH3 > H > p-Cl > p-Br. For the oxidation of several olefins, the complexes of In(III)- and Tl(III)-porphyrins turned out to be more active catalysts than Ga(III)-porphyrin.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.3
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• pp.576-583
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• 2018

Silicon carbide is considered to be a potentially useful material for high-temperature electronic devices, as its band gap is larger than that of silicon and the p-type and/or n-type conduction can be controlled by impurity doping. Particularly, porous n-type SiC ceramics fabricated from ${\beta}-SiC$ powder have been found to show a high thermoelectric conversion efficiency in the temperature region of $800^{\circ}C$ to $1000^{\circ}C$. For the application of SiC thermoelectric semiconductors, their figure of merit is an essential parameter, and high temperature (above $800^{\circ}C$) electrodes constitute an essential element. Generally, ceramics are not wetted by most conventional braze metals,. but alloying them with reactive additives can change their interfacial chemistries and promote both wetting and bonding. If a liquid is to wet a solid surface, the energy of the liquid-solid interface must be less than that of the solid, in which case there will be a driving force for the liquid to spread over the solid surface and to enter the capillary gaps. Consequently, using Ag with a relatively low melting point, the junction of the porous SiC semiconductor-Ag and/or its alloy-SiC and/or alumina substrate was studied. Ag-20Ti-20Cu filler metal showed promise as the high temperature electrode for SiC semiconductors.

• Korean Journal of Materials Research
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• v.11 no.6
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• pp.527-532
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• 2001

Dry etching of copper film using $O_2$ plasma and H(hfac) has been investigated. A one-step process consisting of copper film oxidation with an $O_2$ plasma and the removal of surface copper oxide by the reaction with H(hfac) to form volatile Cu(hfac)$_2$ and $H_2O$ was carried but. The etching rate of Cu in the range from 50 to 700 /min was obtained depending on the substrate temperature, the H(hfac)/O$_2$ flow rate ratio, and the plasma power. The copper film etch rate increased with increasing RF power at the temperatures higher than 215$^{\circ}C$. The optimum H(hfac)/O$_2$ flow rate ratio was 1:1, suggesting that the oxidation process and the reaction with H(hfac) should be in balance. Cu patterning using a Ti mask was performed at a flow rate ratio of 1:1 on 25$0^{\circ}C$\ulcorner and an isotropic etching profile with a taper slope of 30$^{\circ}$was obtained. Cu dry patterning with a tapered angle which is necessary for the advanced high resolution large area thin film transistor liquid-crystal displays was thus successfully obtained from one step process by manipulating the substrate temperature, RF power, and flow rate ratio.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.11
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• pp.1484-1491
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• 2020

Since the slot line transmits electric and magnetic signals through the slot, the size of the slot greatly affects the signal power loss. In order to have low loss, the slot line is mainly used at a high frequency of above 3GHz on a substrate having a high dielectric constant(er). This paper proposes the 4:1 impedance transformer using a slot line on TLC-30 laminate (h=20mil, er=3.0; Taconic) being a relatively low dielectric constant at a frequency of 1.85GHz. In the proposed impedance transformer, the dielectric resonator is arranged on the slot line to reduce signal loss occurring at the slot line. The proposed 4:1 microstrip-slot line impedance transformer fabricated using a (Zr,Sn)TiO4 dielectric resonator(er=38) has the transmission loss(S21) of -0.375dB and the reflection value(S11) of -27.6dB at 1.855GHz. This confirms that the slot line can be stably used even in a low dielectric constant substrate and a low frequency region by using a dielectric resonator.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.1
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• pp.1-8
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• 2005

We fabricate PLT(5) thin film on Pt/TiO/sub x/SiO₂/Si substrate by using sol-gel method and investigate leakage current, switching and retention properties. The leakage current density of PLT(5) thin film is 3.56×10/sup -7/A/㎠ at 4V. In the examination of switching properties, pulse voltage and load resistance were 2V～5V and 50Ω～3.3kΩ, respectively. Switching time has a tendency to decrease from 0.52㎲ to 0.14㎲ with the increase of pulse voltage, and also the time increases from 0.14㎲ to 13.7㎲ with the increase of load resistance. The activation energy obtained from the relation of applied pulse voltage and switching time is about 135kV/cm. The error of switched charge density between hysteresis loop and experiment of polarization switching is about 10%. Also, polarization in retention decreases as much as about 8% after l0/sup 5/s.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.3 s.32
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• pp.91-97
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• 2004

PBT thin films were formed by rf-magnetron sputtering on $Pt/Ti/SiO_2/Si$ substrate. Bulk-PZT target containing $5\%$-excess PbO was used. After PZT thin films had been deposited at room temperature, remaining portion of the thin film was formed by in-situ process. The ferroelectric perovskite phase was formed at $650^{\circ}C$. The leakage current property was improved dramatically by 2-step sputtering, and in the sample containing optimum thickness of room temp.-layer very low leakage current of $2{\times}10^{-7}A/cm^2$ was shown. As a result of the investigation on the leakage current mechanism, the electrical conduction mechanism in all PZT thin films formed by several conditions was confirmed as bulk-limited mechanism.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.3
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• pp.59-65
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• 1999

In this paper, we had studied the possibility of application as Cu thin films from (hfac)Cu(VTMOS) which is very stable. Cu thin films had been studied as a function of deposition temperature. Substrates used in the experiment were PVD TiN on Si wafer. Deposition conditions were as follow : deposition temperature $50^{\circ}C$. Cu thin films were analyzed by AES, four point probe, XRD and SEM. All of deposited films were very pure and some favoring of <111> planes perpendicular to the substrate surface were observed. Cu thin films had two distinct growth rates at various deposition temperature. One is the surface reaction limited region below $200^{\circ}C$, and the other is the mass transport limited region above $200^{\circ}C$. The resistivity of deposited Cu thin films under the optimum deposition condition is $2.5mu\Omega.cm$ Thus, properties of deposited Cu thin films using (hfac)Cu(VTMOS) didn't show difference with Cu thin films from other precursors.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.9
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• pp.566-570
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• 2014

Electrode pattern effects on the capacitive humidity sensor were investigated. The fabrication of the capacitive humidity sensor was formed with three steps. The bottom electrode was formed on the silicon substrate with Pt/Ti thin layer by using shadow mask and e-beam evaporator. The photo sensitive polyimide was formed on the bottom electrode by using photolithography process as a humidity sensitive thin film. The upper electrode was formed on the polyimide thin film with Pt/Ti thin layer by using e-beam evaporator and lift-off method. Three electrode patterns, such as circle, square, and triangle pattern, were used and changed the sizes to investigate the effects. The capacitances of the sensors were decreased 622 to 584 pF with the area decreament of patterns 250,000 to $196,250{\mu}m^2$. From these results, a capacitive humidity sensor with photo sensitive polyimide is expected to be applied to a high sensitive humidity sensor.