• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1988년도 추계학술대회 논문집
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• pp.95-97
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• 1988

The instability of MOS devices is mainly caused by the oxide charges, and as the need to develop the gate metal grows researches for various new metal gate have been performed, and in these researches, the difference work function existing between the metal and the semiconductor should be considered. Here int his paper, the device is made by the sputtering and the LPCVD method using pure Al, compound metal. poly-si, as a gate metal, the result of the research was shown that the work function difference from using different gate metals effects on the flatband voltage shift. This means we can infer that the threshold voltage adjustment is possible by using different gate metals and this whole mechanism makes the devices behavior more stable.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 학술대회 및 기술세미나 논문집 디스플레이 광소자
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• pp.83-84
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• 2006

ITO/4, 4', 4"-tris (N -3 - methylphenyl - N - phenyl - amino) - triphenylamine, [m-MTDATA] / Terbium Iris - (1 - phenyl - 3 - methyl - 4 - (tertiarybutyryl) - pyrazol - 5 - one) triphenylphosphine oxide [$(tb-PMP)_3Tb-(Ph_3PO)$] / Mg:Ag devices were made to investigate its electrical and light emission properties. The thickness of m-MTOATA layer was varied from 0 to 80 nm. There was a threshold thickness for the sufficient hole injection. The insertion of 20 nm thick m-MTDATA layer between ITO and Tb-complex resulted in the right shift of current-voltage curve because of the insufficient hole injection. The low operating voltage can be obtained above the 40 nm of m-MTDATA layer. The insertion of m-MTDATA induced the increase of the background in the electroluminescence spectrum which was dependent on the current density of the devices.

• 대한금속재료학회지
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• 제49권4호
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• pp.304-312
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• 2011

In this study, MOSFET type micro hydrogen gas sensors with platinum catalytic metal gates were designed, fabricated, and their electrical characteristics were analyzed. The devised MOSFET Hydrogen Sensors, called MHS-1 and -2, were designed with a platinum gate for hydrogen gas adsorption, and an additional sensing part for higher gas sensitivity and with a micro heater for operation temperature control. In the electrical characterization of the fabricated Pt-gate MOSFET (MHS-1), the saturated drain current was 3.07 mA at 3.0 V of gate voltage, which value in calculation was most similar to measurement data. The amount of threshold voltage shift and saturated drain current increase to variation of hydrogen gas concentration were calculated and the hydrogen gas sensing properties were anticipated and analyzed.

• 전기전자학회논문지
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• 제25권3호
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• pp.511-516
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• 2021

AlGaN/GaN 반도체 위에 금속이 접합된 HEMT와 SiO₂와 NiO를 게이트 층간막으로 갖는 MOSHFET를 제작하고 NiO 박막에 따른 효과와 특성변화의 원인을 연구하였다. HEMT 구조에서 보인 -3.79 V의 문턱전압은 SiO₂를 층간막으로 했을 때 - 5.52 V로 -1.73 V의 음방향 변화를, NiO를 층간막으로 했을 때 -2.76 V로 +1.03 V의 양방향 변화를 나타냈다. 또 NiO MOSFET의 경우 선형성이 증가하여 넓은 범위에 걸쳐 균일한 트랜스컨덕턴스 특성을 나타냈으며 0 V 이상의 게이트 전압에서는 HEMT와 SiO₂ MOSHFET보다 더 높은 값을 보였다. 게이트에 입력된 펄스신호가 -5 V~0 V로 스윙할 때 HEMT의 포화 드레인 전류는 0.1 Hz~10 Hz의 주파수에서 20%의 감소를 보인 뒤 그 값을 유지하였으나, NiO MOSHFET은 10 Hz에서부터 지속적으로 감소하여 서로 다른 응답특성을 보였다.

• 한국전기전자재료학회논문지
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• 제23권7호
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• pp.545-549
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• 2010

Low-frequency noise (1/f noise) has been measured in order to analyze the Vth instability of ZnO TFTs having two different active layer thicknesses of 40 nm and 80 nm. Under electrical stress, it was found that the TFTs with the active layer thickness of 80 nm shows smaller threshold voltage shift (${\Delta}V_{th}$) than those with thickness of 40 nm. However the ${\Delta}V_{th}$ is completely relaxed after the removal of DC stress. In order to investigate the cause of this threshold voltage instability, we accomplished the 1/f noise measurement and found that ZnO TFTs exposed the mobility fluctuation properties, in which the noise level increases as the gate bias rises and the normalized drain current noise level($S_{ID}/{I_D}^2$) of the active layer of thickness 80 nm is smaller than that of active layer thickness of thickness 40 nm. This result means that the 80 nm thickness TFTs have a smaller density of traps. This result correlated with the physical characteristics analysis performmed using XRD, which indicated that the grain size increases when the active layer thickness is made thicker. Consequently, the number of preexisting traps in the device increases with decreasing thickness of the active layer and are related closely to the $V_{th}$ instability under electrical stress.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.324-326
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• 2016

In this study, we have investigated indium tin zinc oxide (ITZO) as an active channel for non-volatile memory (NVM) devices. The electrical and memory characteristics of NVM devices using multi-stack gate insulator SiO2/SiOx/SiOxNy (OOxOy) with Si-rich SiOx for charge storage layer were also reported. The transmittance of ITZO films reached over 85%. Besides, ITZO-based NVM devices showed good electrical properties such as high field effect mobility of 25.8 cm2/V.s, low threshold voltage of 0.75 V, low subthreshold slope of 0.23 V/dec and high on-off current ratio of $1.25{\times}107$. The transmission Fourier Transform Infrared spectroscopy of SiOx charge storage layer with the richest silicon content showed an assignment at peaks around 2000-2300 cm-1. It indicates that many silicon phases and defect sources exist in the matrix of the SiOx films. In addition, the characteristics of NVM device showed a retention exceeding 97% of threshold voltage shift after 104 s and greater than 94% after 10 years with low operating voltage of +11 V at only 1 ms programming duration time. Therefore, the NVM fabricated by high transparent ITZO active layer and OOxOy memory stack has been applied for the flexible memory system.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1996년도 추계학술대회 논문집
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• pp.71-74
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• 1996

Ta$_2$O$_{5}$ film ale recognized as promising capacitor dielectric for future DRAM\`s. The electrical properties of Ta$_2$O$_{5}$films greatly depend on the heating condition. In the practical fabrication process, several annealing process, such as the annealing of Al in H$_2$(about 40$0^{\circ}C$) and reflow of BPSG (borophosphosilicate glass) film in $N_2$(about 80$0^{\circ}C$), exist after deposition of Ta$_2$O$_{5}$ film. In this paper, we describe the temperature effect on the electrical properties of W/Ta$_2$O$_{5}$/Si structure. The thin film of Ta$_2$O$_{5}$ and tungsten have been deposited on p-si(100) wafer using the sputtering system. The heating temperature was varied from 500 to 90$0^{\circ}C$ in $N_2$for 30min and The degree of temperature is 100\`C. In a log(J/E$^2$) Vs 1/E plot of typical I-V data, we find a linear relationship for the temperature of 500, $600^{\circ}C$ and as deposition. This could indicate Fowler-Nordheim tunneling as the dominant mode of current transports. However, we can not find a linear relationship for the temperature above $700^{\circ}C$. This could not indicate Fowler-Nordheim tunneling as the dominant mode of current transport. The high frequency (1MHz) capacitance-voltage (C-V) of W/Ta$_2$O$_{5}$/Si Capacitor were investigated on the basis of shift in the threshold voltage and dielectric constant. The magnitude of the threshold voltage and dielectric constant depends on the heating temperature, and increases with heating temperature.temperature.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.79-79
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• 2013

Quantum-structures with nanoparticles have been attractive for various electronic and photonic devices [1,2]. In recent, nonvolatile memories such as nano-floating gate memory (NFGM) and resistance random access memory (ReRAM) have been studied using silicides, metals, and metal oxides nanoparticles [3,4]. In this study, we fabricated nonvolatile memories with silicides (WSi2, Ti2Si, V2Si) and metal-oxide (Cu2O, Fe2O3, ZnO, SnO2, In2O3 and etc.) nanoparticles embedded in polyimide matrix, and photovoltaic device also with SiC nanoparticles. The capacitance-voltageand current-voltage data showed a threshold voltage shift as a function of write/erase voltage, which implies the carrier charging and discharging into the metal-oxide nanoparticles. We have investigated also the electrical properties of ReRAM consisted with the nanoparticles embedded in ZnO, SiO2, polyimide layer on the monolayered graphene. We will discuss what the current bistability of the nanoparticle ReRAM with monolayered graphene, which occurred as a result of fully functional operation of the nonvolatile memory device. A photovoltaic device structure with nanoparticles was fabricated and its optical properties were also studied by photoluminescence and UV-Vis absorption measurements. We will discuss a feasibility of nanoparticles to application of nonvolatile memories and photovoltaic devices.

• 전기학회논문지P
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• 제57권2호
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• pp.135-139
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• 2008

MFISFETs with platinum electrode on the $LiNbO_3$/aluminum nitride/Si(100) structures were successfully fabricated and the properties of the FETs have been discussed. $I_D-V_G$ characteristics of MFISFETs for linear region (that is, 0.1 V of the drain voltage) showed hysteresis loop with a counter-clockwise trace due to the ferroelectric nature of $LiNbO_3$ films. A memory window (i.e., threshold voltage shift) of the fabricated device was about 2[V] for a sweep from -4 to +4[V]. The estimated field-effect electron mobility and transconductance on a linear region were 530[$cm^2/V{\cdot}s$] and 0.16[mS/mm], respectively. The drain current of 27[${\mu}A$] on the "on" state was more than 3 orders of magnitude larger than that of 30[nA] on the "off" state at the same "read" gate voltage of l.5[V], which means the memory operation of the MFISFET.

• 한국전기전자재료학회논문지
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• 제20권12호
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• pp.1017-1021
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• 2007

To implement tera bit level non-volatile memories of low power and fast operation, proving statistical reproductivity and satisfying reliabilities at the nano-scale are a key challenge. We fabricate the charge trapping nano scaled SONOS unit memories and 64 bit flash arrays and evaluate reliability and performance of them. In case of the dielectric stack thickness of 4.5 /9.3 /6.5 nm with the channel width and length of 34 nm and 31nm respectively, the device has about 3.5 V threshold voltage shift with write voltage of $10\;{\mu}s$, 15 V and erase voltage of 10 ms, -15 V. And retention and endurance characteristics are above 10 years and $10^5$ cycle, respectively. The device with LDD(Lightly Doped Drain) process shows reduction of short channel effect and GIDL(Gate Induced Drain Leakage) current. Moreover we investigate three different types of flash memory arrays.