• Journal of Power Electronics
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• 제15권2호
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• pp.378-388
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• 2015

This paper proposes a pulse width modulation (PWM)-based sliding mode controller (SMC) for a full-bridge DC-DC converter that can eliminate static output voltage error. Hysteretic SMC in DC-DC converter does not have a fixed switching frequency, and applying hysteretic SMC to full-bridge converters is difficult. Fixed-frequency SMC, which is also called PWM-based SMC, based on equivalent control overcomes these shortcomings. However, the controller order reduction in equivalent control in PWM-based SMC causes static output voltage error. To resolve this issue, an integral item is added to the PWM-based SMC. Sliding mode coefficients are designed by applying a standard second-order system to the sliding mode surface. The effect of adding an integral item on the controller is analyzed, and an integral coefficient design method is proposed. Experiment results on a three-level full-bridge DC-DC converter verify the control scheme and design method proposed in this paper.

• 전력전자학회논문지
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• 제26권3호
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• pp.227-236
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• 2021

This research proposes a modeling and controller design of a three-level boost (TLB) converter for the implementation of maximum power point tracking (MPPT) in the photovoltaic power conditioning system (PCS). Contrary to the output voltage control of the conventional controller, the Photovoltaic PCS requires an input voltage controller for MPPT operation. A TLB converter has the advantage of decreasing the inductor size and increasing efficiency compared with the existing booster converter. However, an optimal controller is difficult to design due to the complexity of the TLB operations, which have two operational modes on the duty ratio boundary of 0.5. Therefore, the unified linear model equations of the TLB converters, which can be applicable to both operational modes, are derived using linearized solar cell expressions. Furthermore, the transfer functions are obtained for the controller design. The MPPT voltage controller is designed using MATLAB SISOTOOL. In addition, a controller for capacitor voltage unbalancing is described and designed. The simulations and experimental verifications are conducted to verify the effectiveness of the small-signal analysis and control system design.

• Journal of Power Electronics
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• 제18권6호
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• pp.1791-1804
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• 2018

To achieve a fast dynamic response and to solve the multi-objective control problems of the output currents, capacitor voltages and system constraints, this paper proposes a deadbeat and hierarchical predictive control with space-vector modulation (DB-HPC-SVM) for five-level nested neutral point piloted (NNPP) converters. First, deadbeat control (DBC) is adopted to track the reference currents by calculating the deadbeat reference voltage vector (DB-RVV). After that, all of the candidate switching sequences that synthesize the DB-RVV are obtained by using the fast SVM principle. Furthermore, according to the redundancies of the switch combination and switching sequence, a hierarchical model predictive control (MPC) is presented to select the optimal switch combination (OSC) and optimal switching sequence (OSS). The proposed DB-HPC-SVM maintains the advantages of DBC and SVM, such as fast dynamic response, zero steady-state error and fixed switching frequency, and combines the characteristics of MPC, such as multi-objective control and simple inclusion of constraints. Finally, comparative simulation and experimental results of a five-level NNPP converter verify the correctness of the proposed DB-HPC-SVM.

• 전력전자학회논문지
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• 제6권1호
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• pp.64-73
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• 2001

영전압 영전류 스위칭 3레벨 DC/DC 컨버터를 제안한다. 이 컨버터는 높은 순환 에너지, 정류다이오드들의 제한적인 기생순환, 그리고 내부 스위치에 의한 제한된 영전암 스위칭 부하뜰 갖는 일반적인 영전압 영전류 스위칭 3레벨 DC/DC 컨버터 약점을 극복한다. 본 논문에서 제안된 컨버터는 외부스위치가 영전압 스위칭을 이룰 수 있도록 하고 1차 측에 플라잉 커패시터로 위상전이 제어하도록 되었다. 또 컨버터는 내부 스위치플이 영전류 스위칭을 이루는 구간동안 l차 측에 에너지 회생 스너버에 의해 리셋 하는 보조회로를 갖는다. 제안된 컨버터들은 6kW, 30kHz 의 실험 장치를 제작하였고 해석하였다.

• 전력전자학회논문지
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• 제27권4호
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• pp.291-296
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• 2022

Capacitor is one of the reliability-critical components in power converters. The lifetime of the capacitor decreases as the operating temperature increases, and power losses caused by capacitor current are the main cause of the capacitor temperature increase. Therefore, various studies are being conducted to improve the lifetime of the capacitor by reducing the current of DC-link capacitors. In this study, pulse width modulation methods proposed for improving the lifetime of DC-link capacitors of the three-level NPC inverter are comparatively analyzed. The lifetime evaluation of the DC-link capacitor under different modulation methods is performed at component level first and then system level by considering all capacitors by applying Monte Carlo simulation. Furthermore, their effects on the efficiency and THD of the output current are also considered.

• Journal of Power Electronics
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• 제18권2호
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• pp.627-639
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• 2018

The fact that the reliability of IGBTs has become a more and more significant aspect of power converters has resulted in an increase in the research on the open circuit (OC) fault location of IGBTs. When an OC fault occurs, a zero-current phenomena exists and frequently appears, which can be found in a lot of the existing literature. In fact, fault variables have a very high correlation with the zero-current interval. In some cases, zero-current interval actually decides the most significant fault feature. However, very few of the previous studies really explain or prove the zero-current phenomena of the fault current. In this paper, the zero-current phenomena is explained and verified through mathematical derivation, based on two-level and three-level NPC static var generators (SVGs). Mathematical models of single OC fault are deduced and it is concluded that a zero-current interval with a certain length follows the OC faults for both two-level and NPC three-level SVGs. Both inductive and capacitive reactive power situations are considered. The unbalanced load situation is discussed. In addition, simulation and experimental results are presented to verify the correctness of the theoretical analysis.

• Journal of Power Electronics
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• 제15권5호
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• pp.1190-1199
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• 2015

This paper presents a new resonant converter to achieve the soft switching of power devices. Two full-bridge converters are connected in series to clamp the voltage stress of power switches at V_in/2. Thus, power MOSFETs with a 500V voltage rating can be used for 800V input voltage applications. Two flying capacitors are connected on the AC side of the two full-bridge converters to automatically balance the two split input capacitor voltages in every switching cycle. Two resonant tanks are used in the proposed converter to share the load current and to reduce the current stress of the passive and active components. If the switching frequency is less than the series resonant frequency of the resonant tanks, the power MOSFETs can be turned on under zero voltage switching, and the rectifier diodes can be turned off under zero current switching. The switching losses on the power MOSFETs are reduced and the reverse recovery loss is improved. Experiments with a 1.5kW prototype are provided to demonstrate the performance of the proposed converter.

• Journal of Power Electronics
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• 제18권5호
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• pp.1501-1512
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• 2018

This paper proposes a three-phase three-switch buck-type converter as the MSC of a wind turbine system. Owing to a novel switching modulation scheme that can eliminate the unwanted diode rectifier mode switching state, the proposed system exhibits a satisfying ac voltage and current waveform quality and torque ripple up to the level of a typical current source rectifier even under a wide power factor operating range. The proposed system has been verified through simulations and HILS tests on a PMSG wind turbine model of 5MW/4160V. The proposed converter has been shown to provide a stator current THD of 3.9% and a torque ripple of 1% under the rated power condition. In addition to the inherent advantage of the reduced switch count of three-phase three-switch buck-type converters, the proposed switching modulation technique can make this converter a viable solution for the MSC placed inside of a nacelle, which is under severe volume, weight and mechanical vibration design limits.

• 전기전자학회논문지
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• 제24권1호
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• pp.19-24
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• 2020

본 논문은 FPGA의 언어 중 하나인 Verilog HDL을 사용한 100 kHz 스위칭의 3-레벨, 2-레벨 SVPWM 기법을 구현에 대한 것이다. 인버터에 주로 사용되는 IGBT소자의 경우 주로 20 kHz 근방에서 스위칭 주파수를 가진다. 최근 차세대 전력 반도체 소자의 연구 개발로 100 kHz 이상의 스위칭을 구현하여 전력변환기를 소형화하고, 고조파의 주입에 따른 여러 가지 새로운 알고리즘의 적용이 가능하게 되었다. IGBT를 이용하는 기존의 시스템에서는 DSP를 이용한 제어가 이루어지는 것이 통상적이나, 100 kHz 스위칭을 위한 제어기 구성으로는 FPGA를 이용한 제어기의 적용이 요구된다. 따라서 본 논문에서는 FPGA를 사용하여 2-레벨 인버터와 3-레벨 인버터에 적용되는 SVPWM의 이론과 FPGA 구현에 대하여 설명하고 SVPWM의 출력 파형을 통해 구현 성능을 확인한다. 한편, 본 논문에서는 3-레벨 인버터에서 SVPWM 구현 시 기존의 방식에서 반송파 2개를 사용하는 방법을 대신하여 반송파 1개만을 사용하는 기법으로 3-레벨 SVPWM을 구현한다.

• Journal of Power Electronics
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• 제16권4호
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• pp.1415-1425
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• 2016

This paper presents a new approach for fault diagnosis in three-level neutral point clamped inverters. The proposed method is based on the average values of the positive and negative parts of normalized output currents. This method is capable of detecting and locating multiple open-circuit faults in the controlled power switches of converters in half of a fundamental period of those currents. The implementation of this diagnostic approach only requires two output currents of the inverter. Therefore, no additional sensors are needed other than the ones already used by the control system of a drive based on this type of converter. Moreover, through the normalization of currents, the diagnosis is independent of the load level of the converter. The performance and effectiveness of the proposed diagnostic technique are validated by experimental results obtained under steady-state and transient conditions.