• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.08a
• /
• pp.248-248
• /
• 2010

We have demonstrated new functionalities of Ag-doped chalcogenide glasses based on their capabilities as solid electrolytes. The influence of silver on the properties of the newly formed materials is regarded in terms of diffusion kinetics, and Ag saturation is related to the composition of the hosting material. Silver saturated in chalcogenide glass has been used in the formation of solid electrolyte, which is the active medium in the programmable metallization cell (PMC) device. In this paper, we investigated the optical properties of Ag-doped chalcogenide thin film by He-Ne laser beam exposure, which is concerned with the Ag-doping effect of PMCs before or after annealing. Chalcogenide bulk glass was fabricated by a conventional melt quenching technique. Amorphous chalcogenide and Ag thin films were prepared by e-beam evaporation at a deposition rate of about $4\;{\AA}/sec$. As a result of resistance change with laser beam exposure, the resistance abruptly dropped from the initial value of $1.4\;M{\Omega}$ to the saturated value of $400\;{\Omega}$.

• Journal of the Korean institute of surface engineering
• /
• v.32 no.3
• /
• pp.428-432
• /
• 1999

As metallic surface has its unique lustrous appearance and optical reflectance in visible range of light, the metallization of plastic surface has been an essential drive toward weight reduction for fuel economy and decorations in transportation industry and has been put into practiced from wet chemical-electrochemial to dry vacuum process in view of an environmental effect. Electron-beam metallization was used in this work with an aim at improving the scratchproof surface hardness of plastic substrate with metallic finish character. Thin film of Al ($1000\AA$) and $SiO_2$($7000\AA$) were metallized on substrate of PC and PMMA and the films were evaluated by pencil test for surface hardness and by cross-cut tape test for adhesion. The ion beam treatment improved around twice as hard as non-treat surface. The ion beam is effect on its hardness and adhesion to surface hardened PC substrate.

• Korean Journal of Materials Research
• /
• v.14 no.1
• /
• pp.46-51
• /
• 2004

The annealing of a Cu(4.5at.% Mg)/$SiO_2$/Si structure in ambient $O_2$, at 10 mTorr, and $300-500^{\circ}C$, allows for the outdiffusion of the Mg to the Cu surface, forming a thin MgO (15 nm) layer on the surface. The surface MgO layer was patterned, and successfully served as a hard mask, for the subsequent dry etching of the underlying Mg-depleted Cu films using an $O_2$ plasma and hexafluoroacetylacetone [H(hfac)] chemistry. The resultant MgO/Cu structure, with a taper slope of about $30^{\circ}C$ shows the feasibility of the dry etching of Cu(Mg) alloy films using a surface MgO mask scheme. A dry-etched Cu(4.5at.% Mg) gate a-Si:H TFT has a field effect mobility of 0.86 $\textrm{cm}^2$/Vs, a subthreshold swing of 1.08 V/dec, and a threshold voltage of 5.7 V. A novel process for the dry etching of Cu(Mg) alloy films, which eliminates the use of a hard mask, such as Ti, and results in a reduction in the process steps is reported for the first time in this work.

• Journal of the Korean Vacuum Society
• /
• v.17 no.6
• /
• pp.518-522
• /
• 2008

The miniaturization of device size and multilevel interlayers have been developed by ULSI circuit devices. These submicron processes cause serious problems in conventional metallization due to the solubility of silicon and metal at the interface, such as an increasing contact resistance in the contact hole and interdiffusion between metal and silicon. Therefore it is necessary to implement a barrier layer between Si and metal. Thus, the size of multilevel interconnection of ULSI devices is critical metallization schemes, and it is necessary reduce the RC time delay for device speed performance. So it is tendency to study the Cu metallization for interconnect of semiconductor processes. However, at the submicron process the interaction between Si and Cu is so strong and detrimental to the electrical performance of Si even at temperatures below $200^{\circ}C$. Thus, we suggest the tungsten-carbon-nitrogen (W-C-N) thin film for Cu diffusion barrier characterized by nano scale indentation system. Nano-indentation system was proposed as an in-situ and nanometer-order local stress analysis technique.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2006.06a
• /
• pp.3-4
• /
• 2006

In this paper, a nickel silicide technology with post-silicidation annealing effect for thin film SOI devices is investigated in detail. Although lower resistivity Ni silicide can be easily obtained at low forming temperature, poor thermal stability and changing of characteristic are serious problems during the post silicidation annealing like ILD (Inter Layer Dielectric) deposition or metallization. So these effects are observed as deposited Ni thickness differently on As doped SOI (Si film 30nm). Especially, the sheet resistance of Ni thickness deposited 20nm was lower than 30nm before the post silicidation annealing. But after the post silicidation annealing, the sheet resistance was changed. Therefore, in thin film SOI MOSFETs or Ni-FUSI technology that the Si film is less than 50nm, it is important to decide the thickness of deposited Ni in order to avoid forming high resistivity silicide.

• Korean Journal of Materials Research
• /
• v.11 no.1
• /
• pp.20-26
• /
• 2001

The deposition characteristics of MOCVO Cu using the (hfac)Cu(I) (1,5-DMCOD)(1,1,1,5,5,5-hexafluoro-2,4-pentanedionato Cu(I) 1,5-dimethyl-cyclooctadine) as a precursor have been investigated in terms of the effects of hydrogen and H(hfac) ligand addition with He carrier gas. MOCVD Cu using a Helium carrier gas showed a low deposition rate (20~$125{\AA}/min$) at the substrate temperature range of 180~$230^{\circ}C$. Moreover, the Cu film deposited at 19$0^{\circ}C$ was very thin (~$700{\AA}$) and showed the lowest resistivity value of $2.8{\mu}{\Omega}-cm$. The deposition rate of MOCVD Cu using $H_2$or H(hfac) addition was significantly enhanced especially at the low temperature region (180~$190^{\circ}C$). Furthermore, thinner Cu films (~$500{\AA}$) provided low resistivity (3.6~$2.86{\mu}{\Omega}-cm$). From surface reflectance measurement, very thin films deposited by using different gas system revealed good surface morphology comparable with sputtered Cu film ($300^{\circ}C$, vacuum-anneal). Hence, Cu film using (hfac)Cu(1,5-DMCOD) as a precursor is expected as a good seed layer in the electrochemical deposition process for Cu metallization.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2001.07a
• /
• pp.45-49
• /
• 2001

We have investigated physical and electrical properties of the Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin film for alternative gate dielectrics in the metal-oxide-semiconductor device. The oxidation of Hf deposited directly on the Si substrate results in the H $f_{x}$/ $O_{y}$ interfacial layer and the high-k Hf $O_2$film simultaneously. Interestingly, the post-oxidation N2 annealing of the H102/H1Si70y thin films reduces(increases) the thickness of an amorphous HfS $i_{x}$/ $O_{y}$ layer(Hf $O_2$ layer). This phenomenon causes the increase of the effective dielectric constant, while maintaining the excellent interfacial properties. The hysteresis window in C-V curves and the midgap interface state density( $D_{itm}$) of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin films less than 10 mV and ~3$\times$10$^{11}$ c $m^{-2}$ -eV without post-metallization annealing, respectively. The leakage current was also low (1$\times$10-s A/c $m^2$ at $V_{g}$ = +2 V). It is believed that these excellent results were obtained due to existence of the amorphous HfS $i_{x}$/ $O_{y}$ buffer layer. We also investigated the charge trapping characteristics using Fowler-Nordheim electron injection: We found that the degradation of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ gate oxides is more severe when electrons were injected from the gate electrode.e electrode.e.e electrode.e.

• Laser Solutions
• /
• v.3 no.2
• /
• pp.25-33
• /
• 2000

One of perspective direction of microfabrication is direct laser writing technology that allows to create metal, semiconductive and dielectric micropatterns on substrate surface. In this work, a two step method, the combination of seed forming process, in which metallic Al seed was selectively generated on AlN ceramic substrate by direct writing technique using a pulsed Nd : YAG laser and subsequent electroless Ni plating on the activated Al seed, was presented. The effects of laser parameters such as pulse energy, scanning speed and pulse frequency on shape of Alseed and conductor line after electroless Ni plating were investigated. The nature of the laser activated surface is analyzed from XPS data. The line width of this metallic Al and Ni is analyzed using SEM. As a results, Al seed line with 24㎛ width and 100㎛ isolated line space is obtained. Finally, laser direct writing can be applied in the field between thin and thick film technique in electronic industry.

• Proceedings of the KIEE Conference
• /
• 2000.11c
• /
• pp.440-442
• /
• 2000

We have successfully fabricated SiC Schottky diodes using Al, Ni, Ti metallization systems. Schottky barrier height and other parameter have been measured by using I-V and C-V technique. The measured barreir heights depend on the metal and measurement techniques used. The barrier heights were 1.85eV(Al), 1.63eV(Ni), 0.97eV(Ti). The Ideality factors were 1.16(Al), 1.07(Ni), 1.05(Ti). Thermal stress tests were performed.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
• /
• 2005.09a
• /
• pp.193-196
• /
• 2005

Low resistance Ni thin films for using NiSi formation and metallization by atomic layer deposition (ALD) method have been studied. ALD temperature window is formed between $200^{\circ}C\;and\;250^{\circ}C$ with deposition rate of $1.25{\AA}$/cycle. The minimum resistance of deposited Ni films shows $4.333\;{\Omega}/\square$ on the $SiO_2/Si$ substrate by $H_2$ direct purging process. The reason of showing the low resistance is believed to be due to format ion of the $Ni_3C$ phase by residual carbon in Bis-Ni The deposited film exhibits excellent step coverage in the trench having 1(100 nm) : 16 (1.6 um) aspect ratio.