• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.1
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• pp.67-73
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• 2009

The stress-strain behavior and its effects on the crack initiation and growth of ITO film on PET substrate with a sheet resistance of 45 ohms/sq were investigated. Electrical resistance increased gradually at the strain of 0.7% in the elastic to plastic transition region of the stress strain curves. Numerous cracks were observed after 1% strain and the increase of the resistance can be linked to the cracking of ITO thin films. The onset strain for the increase of resistance increased with increasing strain rate, suggesting the crack initiation is dependent on the strain rate. Upon loading, the initial cracks perpendicular to the tensile axis were observed and propagated the whole sample width with increasing strain. The spacing between horizontal cracks is thought to be determined by the fracture strength and the interfacial strength between ITO and PET. The crack density increased with increasing strain. The spacing between horizontal cracks (perpendicular to the stress axis) increased with decreasing strain rate, The increase of crack density with decreasing strain rate can be attributed to the higher fraction of the plastic strain to the total strain at a given total strain. As the strain increased over 5% strain, cracks parallel to the stress axis were developed and increased in number with strain, accompanied by drastic increases of resistance.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.2
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• pp.156-161
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• 2008

The fabrication of vanadium oxide films directly on Si(100) substrates by plasma atomic layer deposition(ALD) with vanadium oxytriisopropoxide(VOIP) and oxygen as the reactants have been performed at temperature ranging from 250 to $450^{\circ}C$. Growth rate of vanadium oxide was $2.8{\AA}$/cycle at $300{\sim}400^{\circ}C$ defined as ALD acceptable temperature window, Vanadium oxide has been shown the different phases at $250^{\circ}C$ and more than $300^{\circ}C$. It has been confirmed that the phase of the films deposited at $250^{\circ}C\;was\;V_2O_5$ type and that of the films above $300^{\circ}C\;was\;VO_2(T)$ type measured at room temperature, respectively. A large change in resistance and small temperature hysteresis corresponding to a temperature has been observed in the vanadium oxide film deposited at temperature $350^{\circ}C$.

• Journal of Information Display
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• v.2 no.4
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• pp.1-7
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• 2001

This paper investigates the characteristics of a newly developed high density hollow cathode plasma(HCP) system and its application for the etching of silicon wafers. We used $SF_6$ and $O_2$ gases in the HCP dry etch process. This paper demonstrates very high plasma density of $2{\times}10^{12}cm^{-3}$ at a discharge current of 20 rna, Silicon etch rate of 1.3 ${\mu}m$/min was achieved with $SF_6/O_2$ plasma conditions of total gas pressure of 50 mTorr, gas flow rate of 40 seem, and RF power of200W. This paper presents surface etching characteristics on a crystalline silicon wafer and large area cast type multicrystlline silicon wafer. We obtained field emitter tips size of less than 0.1 ${\mu}m$ without any photomask step as well as with a conventional photolithography. Our experimental results can be applied to various display systems such as thin film growth and etching for TFT-LCDs, emitter tip formations for FEDs, and bright plasma discharge for PDP applications. In this research, we studied silicon etching properties by using the hollow cathode plasma system.

• Korean Journal of Crystallography
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• v.9 no.2
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• pp.96-106
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• 1998

수평 전기로에서 AgInS2 다결정을 합성하여 HWE 방법으로 AgInS2 단결정 박막을 반절연성 GaAs(100) 위에 성장하였다. AgInS2 단결정 박막은 증발원과 기판의 온도를 각각 680℃, 410℃로 성장하였다. 이때 단결정 박막의 결정성이 10 K에서 측정한 광발광 스펙트럼은 597.8 nm(2.0741 eV) 근처에서 엑시톤 방출 스펙트럼이 가장 강하게 나타났으며, 또한 이중결정 X-선 요동곡선(DCRC)의 반폭치(FWHM)도 121 arcsec로 가장 작게 측정되어 최적 성장 조건임을 알 수 있었다. Hall 효과는 van der Pauw 방법에 의해 측정되었으며, 온도에 의존하는 운반자 농도와 이동도는 293 K에서 각각 9.35×1023개/㎥, 2.94×10-2㎡/V·s였다. AgInS2 단결정 박막의 광전류 단파장대 봉우리들로부터 10 K에서 측정된 ΔCr(crystal field splitting)은 0.15eV, ΔSo(spin orbit coupling)는 0.0089 eV였다. 광전도 셀로서 응용성을 알아보기 위해 감도(γ), pc/dc(photocurrent/darkcurrent), 최대허용소비전력(maximum allowable power dissipation: MAPD), 응답시간(response time)등을 측정한 결과, S 증기 분위기에 열처리한 광전도 셀의 경우 γ=0.98, pc/dc=1.02×106, MAPD=312 mW, 오름시간(rise time)=10.4 ms, 내림시간(decay time)=10.8 ms로 가장 좋은 특성을 얻었다.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.11a
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• pp.115-121
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• 2002

In this research we have investigated the characteristics of ultra thin $HfO_2 /SiON$stack structure films using several analytical techniques. SiON layer was thermally grown on standard SCI cleaned silicon wafer at $825^{\circ}C$ for 12sec under $N_2$O ambient. $HfO_2 /SiON$$_4$/$H_2O$ as precursors and $N_2$as a carrier/purge gas. Solid HfCl$_4$was volatilized in a canister kept at $200^{\circ}C$ and carried into the reaction chamber with pure $N_2$carrier gas. $H_2O$ canister was kept at $12^{\circ}C$ and carrier gas was not used. The films were grown on 8-inch (100) p-type Silicon wafer at the $300^{\circ}C$ temperature after standard SCI cleaning, Spectroscopic ellipsometer and TEM were used to investigate the initial growth mechanism, microstructure and thickness. The electrical properties of the film were measured and compared with the physical/chemical properties. The effects of heat treatment was discussed.

• The Korean Journal of Ceramics
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• v.5 no.2
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• pp.131-136
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• 1999

Yttria stabilized zirconia(YSZ) films were deposited on porous NiO substrates and quartz plates by the thermal CVD using $ZrCl_4, YCl_3$ as precursors, and $O_2$ as a reactive gas at atmospheric pressure. The evaporation temperature of $ZrCl_4$ was varied from $250^{\circ}C$ to $550^{\circ}C$ while the temperatures of $YCl_3$ and the substrate were varied from $1000^{\circ}C$ to $1030^{\circ}C$. As the evaporation temperature of $ZrCl_4$ increased, the deposition rate of $ZrO_2$ decreased, contrary to our expectation. As a result of the decreased deposition rate of $ZrO_2$, the yttria content increase. The high evaporation temperature of $ZrCl_4$ makes the well-faceted crystal while the low evaporation temperature leads to the cauliflower-shaped structure. The dependence of the evaporation temperature on the growth rate and the morphological evolution was interpreted by the charged cluster model.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.533-536
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• 2001

Single crystal cubic silicon carbide(3C-SiC) thin film were deposited on Si(100) substrate up to a thickness of 4.3 $\mu\textrm{m}$ by APCVD(atmospheric pressure chemical vapor deposition) method using hexamethyildisilane(HMDS) at 1350$^{\circ}C$. The HMDS flow rate was 0.5 sccm and the carrier gas flow rate was 2.5 slm. The HMDS flow rate was important to get a mirror-like. The growth rate of the 3C-SiC films was 4.3 $\mu\textrm{m}$/hr. The 3C-SiC epitaxical layers on Si(100) were characterized by XRD(X-ray diffraction), raman scattering and RHEED(reflection high-energy electron diffraction), respectively The 3C-SiC distinct phonons of TO(transverse optical) near 796 cm$\^$-1/ and LO(longitudinal optical) near 974${\pm}$1 cm$\^$-1/ were recorded by raman scattering measurement. The deposition films were identified as the single crystal 3C-SiC phase by XRD spectra(2$\theta$=41.5$^{\circ}$). Also, with increase of films thickness, RHEED patterns gradually changed from a spot pattern to a streak pattern

• Applied Microscopy
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• v.45 no.3
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• pp.183-188
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• 2015

Due to the miniaturization of semiconductor devices, their crystal structure on the nanoscale must be analyzed. However, scanning electron microscope-electron backscatter diffraction (EBSD) has a limitation of resolution in nanoscale and high-resolution electron microscopy (HREM) can be used to analyze restrictive local structural information. In this study, three-dimensional (3D) automated crystal orientation and phase mapping using transmission electron microscopy (TEM) (3D TEM-EBSD) was used to identify the crystal structure relationship between an epitaxially grown CdS interfacial layer and a $Cu(In_xGa_{x-1})Se_2$ (CIGS) solar cell layer. The 3D TEM-EBSD technique clearly defined the crystal orientation and phase of the epitaxially grown layers, making it useful for establishing the growth mechanism of functional nano-materials.

• Transactions of the Society of Information Storage Systems
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• v.2 no.2
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• pp.100-104
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• 2006

Stamper surface temperature is very critical in replicating the high density optical disc substrates using injection molding as the pit or land/groove patterns on the optical disc substrate have decreased due to the rapid increase of areal density. During the filling stage, the polymer melt in the vicinity of the stamper surfaces rapidly solidifies and the solidified layer generated during polymer filling greatly deteriorates transcribability and fluidity of polymer melt. To improve transcribability and fluidity of polymer melt, stamper surface temperature should be controlled such that the growth of the solidified layer is delayed during the filling stage. In this study, the effect of heating on replication process was simulated numerically. Then, an injection mold equipped with instant active heating system was designed and constructed to raise the stamper surface temperature over the glass transition temperature during filling stage of the injection molding. Also, the closed loop controller using the Kalman filter and the linear quadratic Gaussian regulator was designed. As a result. the stamper surface temperature was controlled according to the desired reference stamper surface temperature.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.396-396
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• 2007

Highly ordered pore structures as a template for formation of seeds have been prepared by the self-organization process of aluminum oxidation. The a-Si films were deposited on the anodic alumina films and crystallized by laser irradiation. It was found that un-melted part of fine poly-Si grain formed by explosive crystallization (EX) lead super lateral growth(SLG) and occluded with neighbor grains. The crystallized grains along the distribution of seeds were obtained. This results show a great potential for use in novel crystallization for decently uniform polycrystalline Si thin film transistors (poly-Si TFTs).