• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.319-319
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• 2013

Even though the fabrication methods of metal oxide based thin film capacitor have been well established such as RF sputtering, Sol-gel, metal organic chemical vapor deposition (MOCVD), ion beam assisted deposition (IBAD) and pulsed laser deposition (PLD), an applicable capacitor of printed circuit board (PCB) has not realized yet by these methods. Barium Strontium Titanate (BST) and other high-k ceramic oxides are important materials used in integrated passive devices, multi-chip modules (MCM), high-density interconnect, and chip-scale packaging. Thin film multi-layer technology is strongly demanded for having high capacitance (120 nF/$mm^2$). In this study, we suggest novel multi-layer thin film capacitor design and fabrication technology utilized by plasma assisted deposition and photolithography processes. Ba0.6Sr0.4TiO3 (BST) was used for the dielectric material since it has high dielectric constant and low dielectric loss. 5-layered BST and Pt thin films with multi-layer sandwich structures were formed on Pt/Ti/$SiO_2$/Si substrate by RF-magnetron sputtering and DC-sputtering. Pt electrodes and BST layers were patterned to reveal internal electrodes by photolithography. SiO2 passivation layer was deposited by plasma-enhanced chemical vapor deposition (PE-CVD). The passivation layer plays an important role to prevent short connection between the electrodes. It was patterned to create holes for the connection between internal electrodes and external electrodes by reactive-ion etching (RIE). External contact pads were formed by Pt electrodes. The microstructure and dielectric characteristics of the capacitors were investigated by scanning electron microscopy (SEM) and impedance analyzer, respectively. In conclusion, the 0402 sized thin film multi-layer capacitors have been demonstrated, which have capacitance of 10 nF. They are expected to be used for decoupling purpose and have been fabricated with high yield.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.22-25
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• 2002

In this paper, we deposited MgO buffer layer on p-type (100)Si substrate in the condition of substrate temperature 400$^{\circ}C$, working gas ratio Ar:O$_2$=80:20, RF Power 50W, working pressure 10mtorr, and the thickness of the film was about 300${\AA}$. Then we deposited Ba$\sub$0.5/Sr$\sub$0.5/TiO$_3$ thin film using RF Magnetron sputtering method on the MgO/Si substrate in various RF power of 25W, 50W, 75W. The film deposited in 50W showed the best crystalline from the XRD measurement. To know the electrical properties of the film, we manufactured Al/BSTMgO(300${\AA}$)/Si/Al structure capacitor. In the result of I-V measurement, The leakage current density of the capacitor was lower than 10$\^$-7/A/$\textrm{cm}^2$ at the range of ${\pm}$150kV/cm. From C-V characteristics of the capacitor, can calculate the dielectric constant and it was 305. Finally we deposited BST thin film on bare Si substrate and (100)MgO substrate in the same deposition condition. From the comparate of the properties of these samples, we found the properties of BST thin film which deposited on MgO/Si substrate were better than on bare Si substrate and similar to on MgO substrate.

• Korean Journal of Materials Research
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• v.17 no.2
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• pp.81-85
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• 2007

Embedded capacitor technology can improve electrical perfomance and reduce assembly cost compared with traditional discrete capacitor technology. To improve the capacitance density of the $Al_2O_3$ based embedded capacitor on Cu cladded fiber reinforced plastics (FR-4), the specific surface area of the $Al_2O_3$ thin films was enlarged and their surface morphologies were controlled by anodization process parameters. From I-V characteristics, it was found that breakdown voltage and leakage current were 23 V and $1{\times}10^{-6}A/cm^2$ at 3.3 V, respectively. We have also measured C-V characteristics of $Pt/Al_2O_3/Al/Ti$ structure on CU/FR4. The capacitance density was $300nF/cm^2$ and the dielectric loss was 0.04. This nano-porous $Al_2O_3$ is a good material candidate for the embedded capacitor application for electronic products.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.412-415
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• 2003

[ $Si_3N_4$ ] thin film is the good material to fabricate the capacitors at MMIC processes. Normally, $Si_3N_4$ thin films is used to dielectric in the MIM capacitor and film thickness is $2000\;{\AA}$. Insulator(or dielectric) was deposited by PECVD at our MIM structure with air bridge which connect between top metal and contact pad. We optimized PECVD process to fabricate the good capacitors which can be applied at the true MMIC. The thickness of our $Si_3N_4$ thin films was $1000\;{\AA}$ shallower than $2000\;{\AA}$, and their breakdown voltages were above 70V.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1061-1064
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• 2003

In this paper, we deposited A1$_2$O$_3$ thin film using atomic layer deposition(ALD) method on Ti and fabricated metal-insulator-metal(MIM) capacitor. In the result of this study, the typical deposition rate was about 1.12$\AA$/cycle. About 30 nm of Ti was consumed during deposition and TiO$_{x}$ was formed at the interface of A1$_2$O$_3$ and Ti. Its surface roughness was 1.54nm. The leakage current density was 1.5 nA/$\textrm{cm}^2$. The temperature coefficient of capacitance(TCC) of MIM capacitor was 41 ppm/$^{\circ}C$ at 1MHz and 100 ppm/$^{\circ}C$ at 100 kHz.z.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.566-569
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• 2001

In this paper, we investigated the electrical characteristics through DC power at manufacturing the MIS capacitor insulator AIN thin film based on reactive sputtering method. In case of deposition temperature 250$^{\circ}C$, pressure 5mTorr, total flow rate 8sccm(Ar:4sccm N2:4sccm), AIN thin film was deposited with changing DC power. As DC power increses, resistivity is observed a little increase. When AIN thin film is deposited at 100W, the result shows leakage current 10$\^$-8/A/$\textrm{cm}^2$ at 0.1MV/cm. Otherwise, In case of depositing at 150W and 200W, the result shows that the characteristic of leakage current is under 10$\^$-9//$\textrm{cm}^2$ at 0.1MV/cm. In C-V characteristic with DC power, deep depletion phenomenon is observed at inversion region in 100W and 150W. In 200W, that phenomenon, however, was showed to decrease. It shows that the hysterisis increases with being increasing DC power.

• Proceedings of the Materials Research Society of Korea Conference
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• 2002.11a
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• pp.70-70
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• 2002

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.8
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• pp.596-600
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• 1998

A method for the nondestructive read-out of the memory in ferroelectric thin films is demonstrated using the detection second harmonic currents introduced in the ferrolelectric capacitor as a response to an ac signal. The sign and phase of the second harmonic current depends on the polarized state +$P_r or -P_r$, The studied ferroelectric PZT thin film is found to have desirable features for the use as a memory element. This method and material seems as a promising approach for the nonvolatile memory storage.

• Journal of the Semiconductor & Display Technology
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• v.19 no.4
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• pp.84-87
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• 2020

The properties of ultra-thin two-dimensional (2D) organic ferroelectric Langmuir-Blodgett (LB) films of the poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] were investigated to find possible applicability in flexible and wearable electronics applications. In the C-V characteristics of the MFM capacitor of 2-monolayer of 5 nm films, a butterfly hysteresis curve due to the ferroelectricity of P(VDF-TrFE) was confirmed. Typical residual polarization value was measured at 2μC/㎠. When the MFM capacitor with ultra-thin ferroelectric film was measured by applying a 10 Hz bipolar pulse, it was shown that 65% of the initial polarization value in 105 cycles deteriorated the polarization. The leakage current density of the 2-monolayer film was maintained at about 5 × 10-8 A/㎠ for the case at a 5MV/cm electric field. The resistivity of the 2-monolayer film in the case at an electric field at 5 MV/cm was more than 2.35 × 1013 Ω·cm.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.8
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• pp.78-85
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• 1995

We fabricated the Pb$_{1-0.28{\alpha}}La_{0.28}TiO_{3}$ (PLT(28)) thin film successfully by using the sol-gel method and characterized it to evaluate its potential for being utilized as the capacitor dielectrics of ULSI DRAMs. In our sol-gel process, the acetates were used as the starting materials. Through the TGA-DTA analysis, we established the excellent fabrication conditions of the sol-gel method for the PLT(28) thin film. We obtained the dense and crack-free PLT(28) thin film of 100% perovskite phase by drying at 350$^{\circ}C$ after each coating and final annealing at 650$^{\circ}C$. Its electrical properties were measured from the planar capacitors fabricated on the Pt/Ti/SiO$_{2}$/Si substrate. By the P-E hysteresis measurement, its paraelectric phase was identified and its dielectric constant and leakage current density were measured as 936 and 1.1${\mu}A/cm^{2}$, respectively. Those electrical values indicate that the PLT(28) thin film is the most successful candidate for the capacitor dielectrics of ULSI DRAMs at the present.