• Title/Summary/Keyword: Thermal capacitance

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Electrical characteristics of high-k stack layered tunnel barriers with Post-Rapid thermal Annealing (PRA) for nonvolatile memory application

  • Hwang, Yeong-Hyeon;Yu, Hui-Uk;Son, Jeong-U;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.186-186
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    • 2010
  • 소자의 축소화에 따라 floating gate 형의 flash 메모리 소자는 얇은 게이트 절연막 등의 이유로, 이웃 셀 간의 커플링 및 게이트 누설 전류와 같은 문제점을 지니고 있다. 이러한 문제점을 극복하기 위해 charge trap flash 메모리 (CTF) 소자가 연구되고 있지만, CTF 메모리 소자는 쓰기/지우기 속도와 데이터 보존 성능간의 trade-off 관계와 같은 문제점을 지니고 있다. 최근, 이를 극복하기 위한 방안으로, 다른 유전율을 갖는 유전체들을 적층시킨 터널 절연막을 이용한 Tunnel Barrier Engineered (TBE) 기술이 주목 받고 있다. 따라서, 본 논문에서는 TBE 기술을 적용한 MIS-capacitor를 높은 유전율을 가지는 Al2O3와 HfO2를 이용하여 제작하였다. 이를 위해 먼저 Si 기판 위에 Al2O3 /HfO2 /Al2O3 (AHA)를 Atomic Layer Deposition (ALD) 방법으로 약 2/1/3 nm의 두께를 가지도록 증착 하였고, Aluminum을 150 nm 증착 하여 게이트 전극으로 이용하였다. Capacitance-Voltage와 Current-Voltage 특성을 측정, 분석함으로써, AHA 구조를 가지는 터널 절연막의 전기적인 특성을 확인 하였다. 또한, high-k 물질을 이용한 터널 절연막을 급속 열처리 공정 (Rapid Thermal Annealing-RTA) 과 H2/N2분위기에서 후속열처리 공정 (Post-RTA)을 통하여 전기적인 특성을 개선 시켰다. 적층된 터널 절연막은 열처리를 통해 터널링 전류의 민감도의 향상과 함께 누설전류가 감소됨으로서 우수한 전기적인 특성이 나타남을 확인하였으며, 적층된 터널 절연막 구조와 적절한 열처리를 이용하여 빠른 쓰기/지우기 속도와 전기적인 특성이 향상된 비휘발성 메모리 소자를 기대할 수 있다.

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Properties of Polymethyl methacrylate (PMMA) for Polymer Gate Dielectric Thin Films Prepared by Spin Coating (Spin coating 공정을 이용한 Polymethyl methacrylate (PMMA) 박막의 polymer gate dielectric layer로써의 특성평가)

  • Na, Moon-Kyong;Kang, Dong-Pil;Ahn, Myeog-Sang;Myoung, In-Hye;Kang, Young-Taec
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.05b
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    • pp.29-32
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    • 2005
  • Poly (methyl methacrylate) (PMMA) is one of the promising representive of polymer gate dielectric for its high resistivity and sutible dielectric constant. PMMA (Mw=96700) films were prepared on p-Si by spin coating method. PMMA were coated compactively and flatly as observeed by AFM. MIS(Al/PMMA/p-Si) structure was made and capacitance-voltage (C-V) and current-voltage (I-V) measurements were done with PMMA films for different thermal treatment temperature. PMMA films were showed proper dielectric constant and breakdown voltage. Above the glass transition temperature PMMA films degraded. C-V measured at various frequencies, dielectric constant increased a little. The absence of hysteresis in the C-V characteristics, which eliminate the possibility of mobile charges in the PMMA films. The observed thermal stability, smooth surfaces, dielectric constant, I-V behavior implies PMMA formed by spin coating can be used as an efficient gate dielectric layer in OTFTs.

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Electric properties of Polymethyl methacrylate(PMMA) Films to thermal treatment Prepared by Spin Coating (회전 도포 공정을 이용한 Polymethyl methacrylate(PMMA) 박막의 열처리에 따른 전기적 특성 평가)

  • Na, Moon-Kyong;Kang, Dong-Pil;Ahn, Myeog-Sang;Myung, In-Hye;Kang, Young-Taec
    • Proceedings of the KIEE Conference
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    • 2005.07c
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    • pp.1924-1926
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    • 2005
  • Poly(methyl methacrylate) (PMMA) is one of the promising representive of polymer gate dielectric for its high resistivity and sutible dielectric constant. PMMA (Mw=96700) films were prepared on p-Si by spin coating method. PMMA were coated compactively and flatly as observes by AFM. MIS(Al/PMMA/p-Si) structure was made and capacitance-voltage (C-V) and current-voltage (I-V) measurements were done with PMMA films for repeated annealing cycles at $100^{\circ}C$. 1-V measured at various delay times $(0{\sim}20sec)$ showed little change and the absence of hysteresis in the I-V characteristics with delay times, which eliminate the possibility of deep traps in the PMMA films. The observed thermal stability, smooth surfaces, dielectric constant, I-V behavior implies PMMA formed by spin coating can be used as an efficient gate dielectric layer in OTFTs.

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Microwave Annealing을 이용한 MOS Capacitor의 특성 개선

  • Jo, Gwang-Won;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.241.1-241.1
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    • 2013
  • 최근 고집적화된 금속-산화막 반도체 metal oxide semiconductor (MOS) 소자는 크기가 점점 작아짐에 따라 얇은 산화막과 다양한 High-K 물질과 전극에 대하여 연구되고 있다. 이러한 소자의 열적 안정성과 균일성을 얻기 위해 다양한 열처리 방법이 사용되고 있으며, 일반적인 열처리 방법으로는 conventional thermal annealing (CTA)과 rapid thermal annealing (RTA)이 많이 이용되고 있다. 본 실험에서는 microwave radiation에 의한 열처리로 소자의 특성을 개선시킬 수 있다는 사실을 확인하였고, 상대적으로 $100^{\circ}C$ 이하의 저온에서도 공정이 이루어지기 때문에 열에 의한 소자 특성의 열화를 억제할 수 있으며, 또한 짧은 처리 시간 및 공정의 단순화로 비용을 효과적으로 절감할 수 있다. 본 실험에서는 metal-oxide-silicon (MOS) 구조의 capacitor를 제작한 다음, 기존의 CTA나 RTA 처리가 아닌 microwave radiation을 실시하여 MOS capacitor의 전기적인 특성에 미치는 microwave radiation 효과를 평가하였다. 본 실험은 p-type Si 기판에 wet oxidation으로 300 nm 성장된 SiO2 산화막 위에 titanium/aluminium (Ti/Al) 금속 전극을 E-beam evaporator로 형성하여 capacitance-voltage (C-V) 특성 및 current-voltage (I-V) 특성을 평가하였다. 그 결과, microwave 처리를 통해 flat band voltage와 hysteresis 등이 개선되는 것을 확인하였고, microwave radiation 파워와 처리 시간을 최적화하였다. 또한 일반적인 CTA 열처리 소자와 비교하여 유사한 전기적 특성을 확인하였다. 이와 같은 microwave radiation 처리는 매우 낮은 온도에서 공정이 이루어짐에도 불구하고 시료 내에서의 microwave 에너지의 흡수가 CTA나 RTA 공정에서의 열에너지 흡수보다 훨씬 효율적으로 이루어지며, 결과적으로 산화막과 실리콘 기판의 계면 특성 개선에 매우 효과적이라는 것을 나타낸다. 따라서, microwave radiation 처리는 향후 저온공정을 요구하는 nano-scale MOSFET의 제작 및 저온 공정이 필수적인 display 소자 제작의 해결책으로 기대한다.

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Indoor Temperature Estimation System for Reduction of Building Energy Consumption (건물 에너지 절감을 위한 실내 온도 추정 시스템)

  • Kim, Jeong-Hoon;You, Sung Hyun;Lee, Sang Su;Kim, Kwan-Soo;Ahn, Choon-Ki
    • Proceedings of the Korea Information Processing Society Conference
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    • 2017.04a
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    • pp.885-888
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    • 2017
  • In this paper, a new strategy for estimating building temperature based on the modified resistance capacitance (R - C) network thermal dynamic model is proposed. The proposed method gives accurate indoor temperature estimation using minimum variance finite impulse response filter. Our study is clarified by the experimental validation of the proposed indoor temperature estimation method. This experiment scenario environment is composed of a demand response (DR) server and home energy management system (HEMS) in a test bed.

A Design of Thin Film Thermoelectric Cooler for Chip-on-Board(COB) Assembly (박막형 열전 소자를 이용한 Chip-on-Board(COB) 냉각 장치의 설계)

  • Yoo, Jung-Ho;Lee, Hyun-Ju;Kim, Nam-Jae;Kim, Shi-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.9
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    • pp.1615-1620
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    • 2010
  • A thin film thermoelectric cooler for COB direct assembly was proposed and the COB cooler structure was modeled by electrical equivalent circuit by using SPICE model of thermoelectric devices. The embedded cooler attached between the die chip and metal plate can offer the possibility of thin film active cooling for the COB direct assembly. We proposed a driving method of TEC by using pulse width modulation technique. The optimum power to the TEC is simulated by using a SPICE model of thermoelectric device and passive components representing thermal resistance and capacitance. The measured and simulated results offer the possibility of thin film active cooling for the COB direct assembly.

Electrical properties of oxide thin film transistor with $ZrO_2$ gate dielectrics ($ZrO_2$ 게이트 절연막을 이용한 산화물 박막 트랜지스터의 전기적 특성)

  • Debnath, Pulak Chandra;Lee, Jae-Sang;Lee, Sang-Yeol
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.1334_1335
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    • 2009
  • In this paper we have presented recent studies concerning the high performance oxide thin film transistor (TFT) with a-IGZO channel and $ZrO_2$ gate dielectrics. The a-IGZO TFT is fully fabricated at room-temperature without any thermal treatments. The $ZrO_2$ is one of the most promising high-k materials with high capacitance originated from the high dielectric constant. The a-IGZO TFT with $ZrO_2$ shows high performance exhibiting high field effect mobility of $39.82\;cm^2$/Vs and high on-current of 2.52 mA at 10V.

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Simulation of HFC organic Rankine cycles for geothermal power generation (지열발전을 위한 HFC 유기랭킨 사이클의 시뮬레이션)

  • Baik, Young-Jin;Kim, Min-sung;Chang, Ki-Chang;Yoon, Hyung-Kee;Lee, Young-Soo;Ra, Ho-Sang
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.06a
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    • pp.569-572
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    • 2009
  • In this study, HFC ORCs (Organic Rankine Cycles) are investigated for a low-temperature geothermal power generation by a simulation method. A steady-state simulation model is developed to analyze and optimize cycle's performance. The model contains a turbine, a pump, an expansion valve and heat exchangers. The turbine and pump are modelled by an isentropic efficiency. Simulations were carried out for the given heat source and sink inlet temperatures, and given flow rate that is based on the typical power plant thermal-capacitance-rate ratio. 3 HFC fluids are considered as a candidate for a working fluid of low-temperature ORCs. In this study, all optimized HFC ORCs are shown to yield almost the same performance in terms of power for a low-temperature heat source of about $100^{\circ}C$.

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On the Characteristics of Oxide Film on Gap (GaP 산화막 특성에 관하여)

  • Park, J.W.;Moon, D.C.;Kim, S.T.
    • Proceedings of the KIEE Conference
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    • 1988.11a
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    • pp.193-195
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    • 1988
  • The native oxide films were thermally and anodically formed on the n-GaP substrates grown by SSD method and measured this oxide thickness and the chemical composition and the electrical properties with formation condition. The chemical composition of themally oxidized GaP film was composed of mostly $GaPO_4$ at temperature below $800^{\circ}C$ and mostly $\beta-Ga_{2}O_{3}$ above $800^{\circ}C$. But The chemical composition of anodically oxidized GaPfilm was composed of the mixture of $Ga_{2}O_{3}$ and $P_{2}O_{5}$. The barrier height of Al/oxide/n-Gap which was formed at $700^{\circ}C$ by thermal oxidation method were 1.10eV, 1.03eV in Current-Voltage measurement. Interface charge density were $4{\times}10^{12}q(C/cm^2)$ and $3{\times}10^{12}q(C/cm^2)$ in Capacitance-Voltage measurement respectively.

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Properties of Spin-On-Glass Siloxane Thin Films Fluorine-doped by CF$_4$ Plasma (CF$_4$ 플라즈마 처리로 불소를 첨가한 실록산 Spin-On-Glass 박막의 특성)

  • 김현중;김기호
    • Journal of the Korean institute of surface engineering
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    • v.34 no.3
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    • pp.258-263
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    • 2001
  • Siloxane thin films were fabricated on a silicon wafer by spin-coating using a siloxane solution made by the sol-gel process. Fluorine was doped using$ CF_4$ plasma treatment. The film was then annealed in-situ state in the nitrogen atmosphere. In order to examine the influence of annealing and fluorine doping on the siloxane thin film, thermogravimetric-differential thermal analysis (TG-DTA), Fourier transform-infrared spectroscopy (FT-IR) and X-ray photoelectron spectroscopy (XPS) were used and the dielectric constant was determined by the high-frequency capacitance-voltage method. Stable siloxane films could be obtained by in-situ annealing in a nitrogen atmosphere after $CF_4$ plasma treatment, and the dielectric value of the film was $\varepsilon$ 2.5.

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