• Title/Summary/Keyword: Testing time

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Simulation of Time of Flight Diffraction Signals for Reactor Vessel Head Penetrations (원자로 상부 헤드 관통관 TOFD 신호 시뮬레이션)

  • Lee, Tae-Hun;Kim, Young-Sik;Lee, Jeong-Seok
    • Journal of the Korean Society for Nondestructive Testing
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    • v.36 no.4
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    • pp.273-280
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    • 2016
  • The simulation of nondestructive testing has been used in the prediction of the signal characteristics of various defects and in the development of the procedures. CIVA, a simulation tool dedicated to nondestructive testing, has good accuracy and speed, and provides a three-dimensional graphical user interface for improved visualization and familiar data displays consistent with an NDE technique. Even though internal validations have been performed by the CIVA software development specialists, an independent validation study is necessary for the assessment of the accuracy of the software prior to practical use. In this study, time of flight diffraction signals of ultrasonic inspection of a calibration block for reactor vessel head penetrations were simulated using CIVA. The results were compared to the experimentally inspected signals. The accuracy of the simulated signals and the possible range for simulation were verified. It was found that, there is a good agreement between the CIVA simulated and experimental results in the A-scan signal, B-scan image, and measurement of depth.

Bond Strength Evaluation of Asphalt Emulsions used in Asphalt Surface Treatments (아스팔트포장의 표면처리에 사용되는 유화아스팔트의 접착력 특성 평가)

  • Im, Jeong Hyuk;Kim, Y. Richard;Yang, Sung Lin
    • International Journal of Highway Engineering
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    • v.16 no.5
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    • pp.1-8
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    • 2014
  • PURPOSES : The objective of this study is to evaluate the bond strength of asphalt emulsions including polymer-modified emulsions for chip seals and fog seals using the bitumen bond strength (BBS) test. METHODS : For the laboratory testing, the Pneumatic Adhesion tensile Testing Instrument(PATTI) device is used to measure the bond strength between the asphalt emulsion and aggregate substrate based on the AASHTO TP-91. In order to conduct all the tests in controled condition, all test procedures are performed in the environmental chamber. The CRS-2L and the SBS CRS-2P emulsions are used as a polymer-modified emulsion, and then unmodified emulsion, the CRS-2, is compared for the evaluation of chip seal performance. For the fog seal performance evaluation, two types of polymer-modified emulsions and one of unmodified emulsion, the CSS-1H, are employed. For chip seal study, the BBS tests are performed at 30, 60, 120, and 240 minutes of curing times with curing and testing temperatures of $15^{\circ}C$, $25^{\circ}C$, and $35^{\circ}C$. The fog seal tests are conducted at 30, 60, 90, 120, 180 minutes, and 24 hours with curing and testing temperatures of $25^{\circ}C$, $30^{\circ}C$, and $35^{\circ}C$. RESULTS AND CONCLUSIONS : Overall, chip seal emulsions and fog seal emulsions show the similar bond strength trend. At the same testing condition, polymer-modified emulsions show better bond strength than unmodified emulsions. Also, there is no significant difference between polymer-modified emulsions. One of important findings is that the most bond strength reaches their final bond strength within one hour of curing time. Therefore, the early curing time plays a vital role in the performance of chip seals and fog seals.

A Study on Automated Bluetooth Communication Testing Methods Using CSR8670 Chip

  • Kim, Young-Mo;Noh, Hyun-Cheol;Kim, Seok-Yoon
    • Journal of the Korea Society of Computer and Information
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    • v.21 no.5
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    • pp.65-71
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    • 2016
  • Bluetooth technology(BT) is a standard for short distance wireless communication and widely used to connect and control various electronic and telecommunication devices without wires, where CSR8670 chip is generally adopted. These BT devices are required to comply with BT specification and the equipments for conformance test are also important. However, the existing BT testing methods have inconvenience in that they are mostly time-consuming procedure due to not only repetitive execution for each evaluation element but also error-prone nature of manual experiments. This paper proposes an automated BT communication test method using CSR8670 chip, which solves the problems related to manual testing methods. The proposed method can reduce the development period of BT products and guarantee the quality improvement owing to the exact system error detection capability.

Comparison of the Electronic Methods of Raw Silk Testing and Grading with Those of the Current Methods II. The Effectiveness and Convenience of Raw Silk Inspection Process by Uster Tester III (생사검사에 있어서 현행방법과 전자식 방법에 대한 비교분석 II. Uster Tester 3의 세리프렌 검사 정확도와 검사효율)

  • 최병희;김한수
    • Journal of Sericultural and Entomological Science
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    • v.34 no.1
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    • pp.72-80
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    • 1992
  • These studies were brought about to know how much the elctronic methods of raw silk testing is correct, effective and convenient in the testing process. These effectiveness and convenience for the testing process under the emergency of the automatic system in raw silk inspecting process, the convenience of inspection in crease in it's capability decreasing the necessary working members, but as certain defect, the corresponding time span needs more than the former case in kind. Judging from the above mentioned carefully, it is necessary or even immidiate for participants to deeply study and search in earnest as well, before adopting the so called International Method of Raw Silk Test and Classification which was proposed by S.S.C in 1990.

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Design of BIST Circuits for Test Algorithms Using VHDL (VHDL을 이용한 테스트 알고리즘의 BIST 회로 설계)

  • 배성환;신상근;김대익;이창기;전병실
    • The Journal of the Acoustical Society of Korea
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    • v.18 no.1
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    • pp.67-71
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    • 1999
  • In this paper, we design circuits embedded in memory chip which perform memory testing algorithms using BIST scheme to reduce testing time and cost for testing. In order to implement circuits for MSCAN, Marching and checkerboard test algorithms, which have widely used in memory testing, we survey structure of the BIST circuits and describe each block of BIST circuits by using VHDL. Thereafter, We verify behavior of each VHDL coding block and extract BIST circuits for target testing algorithms by CAD tool for simulation and synthesis. Extracted circuits have very low area overhead.

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Application of Accelerated Vibration Testing to Spot-welding Specimen (점용접 표준시편에 대한 가속내구시험법의 적용)

  • 김관주;조성신;정진성
    • Transactions of the Korean Society of Automotive Engineers
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    • v.11 no.3
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    • pp.209-213
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    • 2003
  • It is advantage of accelerated vibration testing to compress service exposures to operating vibration into a reduced laboratory test by increasing the amplitude or frequency of the applied input excitations. This paper proposes an accelerated test method to estimate the high-cycle fatigue life under random excitation. The method consists of conducting a test with amplified input excitation and extrapolating linearly the lift in the accelerated condition into the real lift in field condition. The extrapolation is carried out applying the high-cycle irregular excitation fatigue theory including the rainflow counting, Miner’s damage accumulation rule, and Goodman’s mean stress correction. As a verification, those estimated lift is compared with that acquired by experiment f3r the simple case of spot welding specimen with good agreement. This testing procedure will provide an useful scheme that can reduce testing period associated with developing time schedule of new product.

Numerical modelling and finite element analysis of stress wave propagation for ultrasonic pulse velocity testing of concrete

  • Yaman, Ismail Ozgur;Akbay, Zekai;Aktan, Haluk
    • Computers and Concrete
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    • v.3 no.6
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    • pp.423-437
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    • 2006
  • Stress wave propagation through concrete is simulated by finite element analysis. The concrete medium is modeled as a homogeneous material with smeared properties to investigate and establish the suitable finite element analysis method (explicit versus implicit) and analysis parameters (element size, and solution time increment) also suitable for rigorous investigation. In the next step, finite element analysis model of the medium is developed using a digital image processing technique, which distinguishes the mortar and aggregate phases of concrete. The mortar and aggregate phase topologies are, then, directly mapped to the finite element mesh to form a heterogeneous concrete model. The heterogeneous concrete model is then used to simulate wave propagation. The veracity of the model is demonstrated by evaluating the intrinsic parameters of nondestructive ultrasonic pulse velocity testing of concrete. Quantitative relationships between aggregate size and testing frequency for nondestructive testing are presented.

A Lightning Surge Analysis of Testing Line for Protection of Underground Distribution Systems (지중배전계통 보호를 위한 모의시험선로 서지특성 해석)

  • Kim Byoung-Sung;Lee Jang-Geun;Lee Jong-Beom;Han Byong-Sook
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.55 no.8
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    • pp.313-321
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    • 2006
  • This paper describes the overvoltage obtained by surge behavior analysis in testing underground distribution systems. Model systems consist of overhead distribution line and underground cable. Such model system considered various characteristics of actual distribution systems will be soon constructed at testing yard. Simulation is carried out under various states such as cable kinds, cable length, lightning wave and time, and branch circuits. Model is established by EMTP/ATPDraw. Line Constants are calculated by ATP_LCC. When the direct lightning surge strikes on conductor of overhead line, the overvoltage is calculated using EMTP/ATPDraw in many cases. Simulation results will be compared with real testing results at testing yard in the near future. The compared results will be used to establish protection methods in actual underground distribution systems.

Dynamic Power Supply Current Testing for Open Defects in CMOS SRAMs

  • Yoon, Doe-Hyun;Kim, Hong-Sik;Kang, Sung-Ho
    • ETRI Journal
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    • v.23 no.2
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    • pp.77-84
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    • 2001
  • The detection of open defects in CMOS SRAM has been a time consuming process. This paper proposes a new dynamic power supply current testing method to detect open defects in CMOS SRAM cells. By monitoring a dynamic current pulse during a transition write operation or a read operation, open defects can be detected. In order to measure the dynamic power supply current pulse, a current monitoring circuit with low hardware overhead is developed. Using the sensor, the new testing method does not require any additional test sequence. The results show that the new test method is very efficient compared with other testing methods. Therefore, the new testing method is very attractive.

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Development of the Scale Track to Test Bogie Steering Performance (대차 조향 특성 시험을 위한 축소 트랙 개발)

  • Hur, Hyun-Moo;Park, Jun-Hyuk;You, Won-Hee;Park, Tae-Won
    • Proceedings of the KSR Conference
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    • 2007.11a
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    • pp.301-305
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    • 2007
  • The performance of the railway bogie is classified into the stability and the steering performance. Testing for the bogie stability is conducted on the roller rig. But testing for the bogie steering performance on test facility is very difficult, so the testing for the vehicle curving performance is conducted on the real curve track. And it is desirable to test on the full scale test rig, but it caused many problems relating to test costs, test time. To overcome these problems, the small scale test rig is actively used in the field of bogie stability. Thus, in this paper, we have studied the scale track to test the bogie steering performance. For this, we designed the 1/5 scale test track equivalent to radius 200 curve and confirmed the validity of the testing for the bogie steering performance on the scale curve track through the testing using 1/5 scale bogie.

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