• 한국원자력학회:학술대회논문집
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• 한국원자력학회 2005년도 추계학술발표회
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• pp.703-704
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• 2005

• 한국원자력학회:학술대회논문집
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• 한국원자력학회 2005년도 추계학술발표회
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• pp.422-423
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• 2005

• 한국원자력학회:학술대회논문집
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• 한국원자력학회 2004년도 추계학술발표회 발표논문집
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• pp.1373-1374
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• 2004

• International Journal of Advanced Culture Technology
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• 제3권2호
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• pp.34-41
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• 2015

Bonding strength of a thermal sprayed coating is difficult to measure using a conventional pull-off test method. Scratch test is a potential alternative testing method. An adhesive and a cohesive bond strength of the coating can be measured by the pull-off test while the scratch test performed on the cross-section of the thermal sprayed coating can only demonstrate the cohesive bond strength of the coating. Nevertheless, it is still beneficial to perform the scratch testing on the cross-section of the coating for the sake of comparison thus providing an alternative to the pull-off test. The scratch test method can reduce testing time and cost in the long run due to a significant cost reduction in consumables and energy and time saving from the curing step of the glue used in the pull-off test. This research investigates the possibility of using the scratch test to measure the cohesive bond strength of Mo/NiCrBSi composite coating. The results from the pull-off test and the scratch test indicate that the cohesive bond strengths of the Mo composite coating show similar trend and that the cohesive bond strength are increased when increasing NiCrBSi content.

• 한국원자력학회:학술대회논문집
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• 한국원자력학회 2005년도 춘계학술발표회
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• pp.1144-1145
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• 2005

• 한국군사과학기술학회지
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• 제27권3호
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• pp.387-394
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• 2024

This paper describes a progressive test and evaluation strategy for verification of Korean Fighter eXperimental (KF-X) AESA(Active Electronically Scanned Array) radar development. Three progressive stages of development test and evaluation were officially performed from simulated test conditions to actual operating conditions according to standards: radar function/performance and avionics integration. KF-X AESA radar development is repeatedly verified by progressive stages consisting of five tests: Roof-lab ground test, System Integration Laboratory(SIL) ground test, Flying Test Bed(FTB) test, KF-X ground test, and KF-X flight test. As a result, the risk factor decreases as stages and tests progress. Therefore, development test and evaluation of KF-X AESA radar are successfully performed at low development risk.

• Journal of Computing Science and Engineering
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• 제9권3호
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• pp.142-154
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• 2015

Fault localization techniques help locate faults in source codes by exploiting collected test information and have shown promising results. To precisely locate faults, the techniques require a large number of test cases that sufficiently exercise the executable statements together with the label information of each test case as a failure or a success. However, during the process of software development, developers may not have high-coverage test cases to effectively locate faults. With the test case generation techniques, a large number of test cases without expected outputs can be automatically generated. Whereas the execution results for generated test cases need to be inspected by developers, which brings much manual effort and potentially hampers fault-localization effectiveness. To address this problem, this paper presents a method to select a few test cases from a number of test cases without expected outputs for result inspection, and in the meantime selected test cases can still support effective fault localization. The experimental results show that our approach can significantly reduce the number of test cases that need to be inspected by developers and the effectiveness of fault localization techniques is close to that of whole test cases.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권3호
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• pp.397-403
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• 2015

This paper presents a new SOC test compression scheme in Embedded Deterministic Test (EDT) compression environment. Compressed test data is brought over the TAM from the tester to the cores in SOC and decompressed in the cores. The proposed scheme allows cores tested at the same time to share some test channels. By sharing free variables in these channels across test cubes of different cores decompressed at the same time, high encoding efficiency is achieved. Moreover, no excess control data is required in this scheme. The ability to reuse excess free variables eliminates the need for high precision in matching the number of test channels with the number of care bits for every core. Experimental results obtained for some SOC designs illustrate effectiveness of the proposed test application scheme.

• International Journal of Computer Science & Network Security
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• 제23권1호
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• pp.103-111
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• 2023

Implementing conventional DFT solution for arrays of DNN accelerators having large number of processing elements (PEs), without considering architectural characteristics of PEs may incur overwhelming test overheads. Recent DFT based techniques have utilized the homogeneity and dataflow of arrays at PE-level and Core-level for obtaining reduction in; test pattern volume, test time, test power and ATPG runtime. This paper reviews these contemporary test solutions for ASIC based DNN accelerators. Mainly, the proposed test architectures, pattern application method with their objectives are reviewed. It is observed that exploitation of architectural characteristic such as homogeneity and dataflow of PEs/ arrays results in reduced test overheads.

• 한국신뢰성학회지:신뢰성응용연구
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• 제9권3호
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• pp.233-248
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• 2009

PAM(Power Amplifier Module) is the important part of a mobile phone transmitter. It amplifies the strength of signal transmitting from a mobile phone to base stations enough to resist noise or interference. In this paper reliability assessment criteria for the PAM are established in terms of quality certification test and lifetime test. The former quality certification test comprises general performance test and environmental test. Items which pass the test undergo lifetime test which guarantees the extent of mean lifetime with certain confidence.