• Anxiety and mood
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• v.19 no.1
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• pp.19-26
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• 2023

Objective : This study aimed to investigate the effect of a 5-minute short mindfulness intervention on emotional regulation and cognitive improvement compared to self-awareness intervention. Methods : A total of 40 participants were randomly assigned and divided into a mindfulness group and a self-aware group. Participants responded to Korean Version of Positive Affect and Negative Affect Schedule (K-PANAS), and Korean version of Toronto Mindfulness Scale (K-TMS) to confirm prior homogeneity. Both groups performed processing according to each group after completing sentences related to themselves for self-focusing. Afterwards, the participants performed the Emotional Attentional Blink (EAB) task as a behavioral measure, and responded to K-PANAS and K-TMS post hoc. Results : The mindfulness group showed lower negative emotions in the K-PANAS than the self-awareness group. The mindfulness group showed higher accuracy than the self-awareness group in negative stimuli presented in the 200 ms condition and neutral stimuli presented in the 800 ms condition. However, there was no difference between groups in K-TMS. Conclusion : The study suggests that mindfulness and self-awareness have different emotion regulation strategies in negative stimuli. Additionally, 5-minute mindfulness intervention was relatively beneficial to improve cognitive function.

• Journal of Korean Home Economics Education Association
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• v.30 no.4
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• pp.165-185
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• 2018

The purpose of the study was to show the development process of the total instructional alignment based on the 2015 revised technology home economics curriculum, and to present the detailed aspects of this task. The results of this study were as follows: First, the clarity phase of the performance established the annual evaluation plan to ensure the consistency of the achievement standard, the learning objectives and the assessment objectives through an analysis of the curriculum. Second, the development phase of the performance tasks and the grading criteria analyzed the contents area and determined the performance assessment task. The performance assessment consisted of a portfolio and project activity types, and also comprised of knowledge markets, as well as e-NIE tasks, including individual tasks and collective tasks. Third, the performance assessment and the results phase were conducted after planning the class operation according to the instructors' directions and arrangement of the schedule into block classes. Afterwards, the performance assessment tasks were revised by the teaching-learning community and class reflection on practical application. As these results demonstrate, developing performance tasks that are centered on the learner's development processes can contribute to teachers' expertise and improvement of instruction.

• Journal of KIISE:Computer Systems and Theory
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• v.35 no.9_10
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• pp.429-440
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• 2008

As embedded system becomes more complex, software development becomes more important in the entire design process. Most embedded applications consist of multi -tasks, that are executed in parallel. So, dataflow model that expresses concurrency naturally is preferred than sequential programming language to develop multitask software. For the execution of multitasking codes, operating system is essential to schedule multi-tasks and to deal with the communication between tasks. But, it is needed to execute multitasking code without as when the target hardware platform cannot execute as or target platforms are candidates of design space exploration, because it is very costly to port as for all candidate platforms of DSE. For this reason, we propose the serialized multitasking code generation technique from dataflow specification. In the proposed technique, a task is specified with dataflow model, and generated as a C code. Code generation consists of two steps: First, a block in a task is generated as a separate function. Second, generated functions are scheduled by a multitasking scheduler that is also generated automatically. To make it easy to write customized scheduler manually, the data structure and information of each task are defined. With the preliminary experiment of DivX player, it is confirmed that the generated code from the proposed framework is efficiently and correctly executed on the target system.

• Journal of KIISE:Computer Systems and Theory
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• v.33 no.9
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• pp.592-607
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• 2006

This paper proposes a technique to select processors and hardware IPs and to map the tasks into the selected processing elements, aming to achieve high performance with minimal system cost when multitask applications with real-time constraints are run on a multicore SoC. Such technique is called to 'Hardware-Software Cosynthesis Technique'. A cosynthesis technique was already presented in our early work [1] where we divide the complex cosynthesis problem into three subproblems and conquer each subproblem separately: selection of appropriate processing components, mapping and scheduling of function blocks to the selected processing component, and schedulability analysis. Despite good features, our previous technique has a serious limitation that a task monopolizes the entire system resource to get the minimum schedule length. But in general we may obtain higher performance in multitask multicore system if independent multiple tasks are running concurrently on different processor cores. In this paper, we present two mapping techniques, task mapping avoidance technique(TMA) and task mapping pinning technique(TMP), which are applicable for general cases with diverse operating policies in a multicore environment. We could obtain significant performance improvement for a multimedia real-time application, multi-channel Digital Video Recorder system and for randomly generated multitask graphs obtained from the related works.

• Proceedings of the Korean Institute Of Construction Engineering and Management
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• 2007.11a
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• pp.68-74
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• 2007

Critical Chain Project Management(CCPM) is a new project management system paradigm which maintains the advantages of PERT/CPM and improves the shortcomings of it. In CCPM the task durations are determined as 50% time estimates, ie average time discarding the their contingency. CCPM determines the critical chain the constraint of a projects considering the logical precedence relationship and resource conflict resolution. Project buffer is located at the end of critical chain to absorb the variations of critical chain. The size of project buffer is usually calculated as the half of the sum of critical chain length. Also feeding buffer is inserted after each non-critical chain which feeding into the critical chain to prevent the time delay of critical chain from uncertainties of non-critical chains. Resource buffer can be utilized to improve the availability of resources of critical chain. Buffer management is a project execution and control mechanism. Buffers are classified into 3 zones. They are OK zone, Watch and Plan zone and Expediting zone. If the project status is within Watch and Plan zone, contingency plan is established. And if it changes into Expediting zone, the preplanned contingency plan are executed to recover the time delay. In CCPM the workers are asked to work with relay runner work mechanism that they work fast if possible and report their completion to project manager for the succeeding task to start as soon as possible. The task durations are not considered as the promised time schedule. The multi-tasking is prohibited.

• Journal of KIISE:Computer Systems and Theory
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• v.26 no.10
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• pp.1264-1274
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• 1999

본 논문에서는 분산된 클록들을 주기적으로 동기화 시키는 분산 실시간 시스템에서 시간적 제약을 만족시키기 위한 정적/동적 시간 제약(timing constraint) 변환 기법을 제안한다. 전형적인 이산클록동기화(discrete clock synchronization) 알고리즘은 클록의 값을 순간적으로 조정하여 클록의 시간이 불연속적으로 진행한다. 이러한 시간상의 불연속성은 시간적 이벤트를 잃어버리거나 다시 발생시키는 오류를 범하게 한다.클록 시간의 불연속성을 피하기 위해 일반적으로 연속클록동기화(continuous clock synchronization) 기법이 제안되고 있지만 소프트웨어적으로 구현되면 많은 오버헤드를 유발시키는 문제점이 있다. 본 논문에서는 시간적 제약을 동적으로 변환시키는 DCT (Dynamic Constraint Transformation) 기법을 제안하였으며, 이를 통해 기존의 이산클록동기화 알고리즘을 수정하지 않고서도 클록 시간의 불연속성에 의한 문제점들을 해결할 수 있도록 하였다. 아울러 DCT에 의해 이산클록동기화 하에서 생성된 태스크 스케쥴이 연속클록동기화에 의해 생성된 스케쥴과 동일함을 증명하여 DCT의 동작이 이론적으로 정확함을 증명하였다.또한 분산 실시간 시스템에서 지역 클록(local clock)이 기준 클록과 완벽하게 일치하지 않아서 발생하는 스케쥴링상의 문제점을 다루었다. 이를 위해 먼저 두 가지의 스케쥴링 가능성, 지역적 스케쥴링 가능성(local schedulability)과 전역적 스케쥴링 가능성(global schedulability)을 정의하고, 이를 위해 시간적 제약을 정적으로 변환시키는 SCT (Static Constraint Transformation) 기법을 제안하였다. SCT를 통해 지역적으로 스케쥴링 가능한 태스크는 전역적으로 스케쥴링이 가능하므로, 단지 지역적 스케쥴링 가능성만을 검사하면 스케쥴링 문제를 해결할 수 있도록 하였고 이를 수학적으로 증명하였다.Abstract In this paper, we present static and dynamic constraint transformation techniques for ensuring timing requirements in a distributed real-time system possessing periodically synchronized distributed local clocks. Traditional discrete clock synchronization algorithms that adjust local clocks instantaneously yield time discontinuities. Such time discontinuities lead to the loss or the gain of events, thus raising serious run-time faults.While continuous clock synchronization is generally suggested to avoid the time discontinuity problem, it incurs too much run-time overhead to be implemented in software. We propose a dynamic constraint transformation (DCT) technique which can solve the problem without modifying discrete clock synchronization algorithms. We formally prove the correctness of the DCT by showing that the DCT with discrete clock synchronization generates the same task schedule as the continuous clock synchronization.We also investigate schedulability problems that arise when imperfect local clocks are used in distributed real-time systems. We first define two notions of schedulability, global schedulability and local schedulability, and then present a static constraint transformation (SCT) technique. The SCT ensures that it is sufficient to check the schedulability of a task locally in a node with a local clock, since the global schedulability of the task is derived from its local schedulability through SCT. We formally prove the correctness of SCT.

• Journal of Intelligence and Information Systems
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• v.14 no.4
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• pp.31-46
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• 2008

A stacking yard of a container terminal is a space for temporarily storing the containers that are carried in or imported until they are carried out or exported. If the containers are stacked in an inappropriate way, the efficiency of operation at the time of loading decreases significantly due to the rehandlings. The remarshaling is the task of rearranging containers during the idle time of transfer crane for the effective loading operations. This paper proposes a method of planning for remarshaling in a yard block of an automated container terminal. Our method conducts a search in two stages. In the first stage, the target stacking configuration is determined in such a way that the throughput of loading is maximized. In the second stage, the crane schedule is determined so that the remarshaling task can be completed as fast as possible in moving the containers from the source configuration to the target configuration. Simulation experiments have been conducted to compare the efficiency of loading operations before and after remarshaling. The results show that our remarshaling plan is really effective in increasing the efficiency of loading operation.

• Journal of Industrial Convergence
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• v.16 no.1
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• pp.21-26
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• 2018

The Seaborne Trade Volume accounts for 97% of the total. This means that the port operation management system can improve port efficiency, reducing operating costs, and the manager who manages all operations at the port needs to check and respond quickly when delays of work and equipment support is needed. Based on the real-time location information confirmation of yard automation equipment used the existing system GPS, the real-time location information confirmation system is a GPS system of the tablet, rather than a port operation system that monitors location information for the entered information, depending on the completion of the task or the start of the task. Network configurations also reduce container processing delays by using commercial LTE services that do not have shading due to containers in the yard also reduce container processing delays. Trough introduction of smart devices using Android or IOS and container processing scheduling utilizing artificial intelligence, we will build a minimum delay system with Smart Device usage of container processing applications and optimization of container processing schedule. The adoption of smart devices and the minimization of container processing delays utilizing artificial intelligence are expected to improve the quality of port services by confirming the processing containers in real time to consumers who are container information demanders.

• The Journal of the Korea institute of electronic communication sciences
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• v.13 no.3
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• pp.561-570
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• 2018

Artificial Intelligence is one of the technologies that are being discussed in the Fourth Industrial Revolution, attracting the attention from companies around the world and this technology is being applied to various industries such as education, finance, automobile, etc. AI integrated ChatBot is a system designed to respond to user questions according to defined response rules. This system is gradually expanded from simple inquiry responses for intelligent virtual assistant service, weather, traffic, schedule, etc. to service provisions through user pattern analysis, to solidify its position as a life-style service. As a result, research on AI integrated ChatBot platform has become necessary. Therefore, this study suggests the design and implementation of an intelligent chatbot service platform for small businesses.

• Journal of Institute of Control, Robotics and Systems
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• v.6 no.2
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• pp.207-216
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• 2000

This paper introduces an effective system design method to develop a customer oriented product using a design optimization process and to select a set of critical design paramenters,. The process results in the development of a successful product satisfying customer needs and reducing development risk. The proposed scheme adopted a five step QFD(Quality Function Deployment) in order to extract design parameters from customer needs and evaluated their priority using risk factors for extracted design parameters. In this process we determine critical design parameters and allocate them to subsystem designers. Subsequently design engineers develop and test the product based on these parameters. These design parameters capture the characteristics of customer needs in terms of performance cost and schedule in the process of QFD, The subsequent risk management task ensures the minimum risk approach in the presence of design parameter uncertainty. An application of this approach was demonstrated in the development of weld quality monitoring system. Dominant design parameters affect linearity characteristics of weld defect feature vectors. Therefore it simplifies the algorithm for adopting pattern classification of feature vectors and improves the accuracy of recognition rate of weld defect and the real time response of the defect detection in the performance. Additionally the development cost decreases by using DSP board for low speed because of reducing CPU's load adopting algorithm in classifying weld defects. It also reduces the cost by using the single sensor to measure weld defects. Furthermore the synergy effect derived from the critical design parameters improves the detection rate of weld defects by 15% when compared with the implementation using the non-critical design parameters. It also result in 30% saving in development cost./ The overall results are close to 95% customer level showing the effectiveness of the proposed development approach.