• 전기학회논문지P
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• 제65권4호
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• pp.326-334
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• 2016

In this paper for developing and implementing the realtime HD level video streaming transmitter which is operated on the multi-platform in all network and client environment compared to the exist video live streaming transmitter. We design the realtime HD level video streaming transmitter supporting the multi-platform using the TMS320DM386 video processor of T.I company and then porting the Linux kernel 2.6.29 and implementing the RTSP(Real Time Streaming Protocol)/RTP(Real Time Transport Protocol), HLS(Http Live Streaming), RTMP(Real Time Messaging Protocol) that can support the multi-platform of video stream protocol of the received equipments (smart phone, tablet PC, notebook etc.). For proving the performance of developed video streaming transmitter, we make the testing environment for testing the performance of streaming transmitter using the notebook, iPad, android Phone, and then analysis the received video in the client displayer. In this paper, we suggest the developed the Realtime HD(High Definition) level Video Streaming transmitter performance data values higher than the exist products.

• 전기학회논문지
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• 제57권9호
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• pp.1485-1490
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• 2008

This paper proposes a new Fourier transform-based phasor estimation method to eliminate the adverse influence of the exponentially decaying dc offsets when Discrete Fourier Transform (DFT) is used to calculate the phasor of the fundamental frequency component in a relaying signal. By subtracting the result of odd-sample-set DFT from the result of even-sample-set DFT, the information of dc offsets can be obtained. Two dc offsets in a relaying signal are treated as one dc offset which is piecewise approximated in one cycle data window. The effect of the dc offsets can be eliminated by the approximated dc offset. The performance of the proposed algorithm is evaluated by using computer-simulated signals and EMTP-generated signals. The algorithm is also tested on a hardware board with TMS320C32 microprocessor. The evaluation results indicate that the proposed algorithm has the stable and accurate eliminating performance even if the input signal contains two decaying dc components having different time constants.

• Journal of Power Electronics
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• 제11권1호
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• pp.37-44
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• 2011

In this paper, a four-phase 8/6-pole 4-kW SR motor drive model is presented. Based on experimental data, the model allows an accurate simulation of a drive in dynamic operation. Simulations are performed and a laboratory type set-up is built based on a TI TMS320F2812 platform to experimentally verify the theoretical results obtained for a SR motor. To reduce acoustic noise and to correct the power factor of this drive, a two-stage power converter is proposed that uses a current source rectifier (CSR) as the input stage for the asymmetrical converter of the studied SRM. Employing the space-vector modulation (SVM) method in matrix converters, the CSR switching allows the dc link's capacitors to be eliminated and the power factor of the SRM drive to be improved. As the electrical motive force (emf) is directly proportional to the rotor speed, the input voltage to the machine can be programmed to be a function of the speed with the modulation index of the CSR, leading to a reduction in the acoustic noise of the SRM drive. Simulation of the whole SRM drive system is performed using MATLAB-Simulink. The results fully comply with the required conditions such as power factor correction with an improvement in the THD.

• 한국자동차공학회논문집
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• 제9권6호
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• pp.143-151
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• 2001

During the past several years, the major interests of car manufacturers in development of automatic transmission were in durability and shift quality. However, a large number of researches for improving shift quality that are based on dynamic characteristics of shifting mechanism have been rarely adopted in the developing process because it is quite difficult to predict the shifting performance from the dynamics simulation. One of the important reasons for the difference between simulation results and experiments arises from the automatic transmission hydraulic system that consists of many valves with high order model and shows a lot different dynamics to temperature variation. In this work, hardware-in-the-loop simulation system for automatic transmission was developed f3r improving the accuracy of simulated result by combining the real-time simulation model with the real hydraulic system. The real-time simulation for automatic transmission model excluding hydraulic system is executed with TI's TMS320C31 DSP and the interfacing board which includes 12bit A/D, PWM signal generator and driver, serial driver ,etc is designed for acquiring the simulation data and signal interface with hydraulic system. We verified the proper operation and correctness of shifting result by comparing the off-line simulation result with that of HILS and experimental result which was performed on transmission dynamometer driven by electric motor.

• 한국전자파학회논문지
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• 제13권10호
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• pp.1061-1070
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• 2002

본 논문은 IS2000 환경에서 기지국의 수신 성능을 증대시키기 위한 스마트 안테나 Test-bed의 성능을 분석하였다. 따라서 본 논문에서는 IS2000 1x의 수신 신호 모델링, 빔형성 알고리즘, 빔형성 모듈 설계 및 테스트 베드를 이용한 성능 분석을 하였다. 수신 성능을 높이는 최적의 빔형성을 위해 빔형성 알고리즘은, Lagrange 공식을 이용한 Generalized Lagrange 알고리즘을 이용하였다. 이를 신호처리 칩을 이용한 보드로 직접 설계, 제작하였다. 빔형성 모듈에 대한 성능시험 결과 정상동작 확인 및 실시간 동작처리가 가능함을 보였다. 따라서 본 논문에서 제시한 스마트 안테나 Test-bed는 IS2000 이동통신 환경에서 우수한 성능을 나타낼 수 있음을 증명하였다.

• 대한전기학회논문지:시스템및제어부문D
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• 제49권1호
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• pp.48-53
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• 2000

In this paper, we develop a TMS320C31 (60MHz) digital signal processor (DSP) board to synthesize gradient waveforms for Spiral Scan Imaging (SSI), which is one of the ultra fast magnetic resonance imaging (MRI) methods widely used. In SSI, accurate gradient waveforms are very essential to high quality magnetic resonance images. For this purpose, sampling rate for synthesizing the gradient waveforms is set twice as high as the data sampling rate. With the developed DSP boards accurate gradient waveforms are obtained. Ultra fast spiral scan imaging with the developed with the developed DSP board is currently under development.

• 제어로봇시스템학회논문지
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• 제3권6호
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• pp.626-631
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• 1997

This paper represents the design of a real-time image preprocessing system. The preprocessing system performs hardware-wise mask operations and thresholding operations at the speed of camera output single rate. The preprocessing system consists of the preprocessing board and the main processing board. The preprocessing board includes preprocessing unit that includes a $5\times5$ mask processor and LUT, and can perform mask and threshold operations in real-time. To achieve high-resolution image input data($20485\timesn$), the preprocessing board has a linescan camera interface. The main processing board includes the image processor unit and main processor unit. The image processor unit is equipped with TI's TMS320C32 DSP and can perform image processing algorithms at high speed. The main processor unit controls the operation of total system. The proposed system is faster than the conventional CPU based system.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 하계학술대회 논문집 A
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• pp.284-286
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• 1993

Software and hardware for cochlear implant system have been developed to create a speech signal processing system which, in real-time, extracts model parameter including formants, pitch, amplitude information. The system is based on the Texas Instruments TMS320 family. In hardware, computer interface has been desisted and implemented that allows presentation of biphasic pulse stimuli to patients with the hearing handicapped. The host computer sends a stream of bytes to the parallel port. Upon receipt of the data the interface generates the appropriate burst sequence that is delivered to the patient's external transmitter coil. The coded information is interpreted by the Nucleus-22 internal receiver that delivers the pulse to the specified electrodes at the specified amplitude and pulse width.

• 한국컴퓨터정보학회논문지
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• 제17권1호
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• pp.1-10
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• 2012

프로세서는 더 이상 동작 주파수를 높이는 방법이 아닌 다수의 프로세서를 집적하는 멀티프로세서로 기술 발전이 이루어지고 있다. 최근 2, 4, 8개의 프로세서 코어를 넘어 64, 128개 이상의 프로세서를 집적한 대규모 데이터 처리용 고성능 프로세서들이 개발되고 있다. 본 논문에서는 기타의 음 합성을 위한 최적의 매니코어 프로세서 구조를 제안한다. 기존의 연구에서는 하나의 기타 현에 하나의 프로세싱 엘리먼트(processing element, PE)를 할당하여 음을 합성하였으나, 본 논문은 하나의 기타 현에 여러 개의 PE를 할당하고 각각의 경우에 대해 시스템 성능, 시스템 면적 효율 및 에너지 효율을 평가하였다. 샘플링율이 44.1kHz, 양자화 비트 16인 기타 음을 사용하여 모의 실험한 결과, 시스템 면적 효율은 PE 수가 24개, 에너지 효율은 PE 수가 96개일 때 각각 최적의 효율을 보였다. 또한, 최적의 매니코어 프로세서를 이용하여 합성한 결과 합성음은 원음과 스펙트럼에서 매우 유사하였다. 더불어, 음 합성에 가장 많이 사용되는 TI TMS320C6416보다 시스템 면적에서 1,235배, 에너지 효율에서 22배의 향상을 보였다.

• 한국콘텐츠학회논문지
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• 제8권5호
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• pp.72-81
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• 2008

고성능 DSP는 보통 캐쉬와 내부 메모리를 지원한다. 이러한 고성능 DSP에 멀티미디어 스트림 응용을 최적화하여 구현하고자 하는 경우에는, DSP 가 지원하는 캐쉬와 내부 메모리를 효율적으로 잘 활용하여야 한다. 본 논문에서는 2단계 레벨 캐쉬 구조 및 내부 메모리 구성을 지원하는 고성능 DSP인 TMS320C6000 시리즈에 대해 동영상 인코더와 같은 멀티미디어 스트림 처리 응용을 최적으로 구현하기 위해서 필요한 캐쉬 성능 분석, 내부 메모리 구성 및 배치에 따른 성능 분석과 개선 방안에 대해 연구하였다. 분석 및 실험 결과, L2 메모리의 경우, 이중 집합연관 캐쉬로 구성하고, 남은 메모리는 내부 메모리로 구성하는 것이 수행 시간 성능 개선에 효과적임을 확인하였다. 또한, L1P 캐쉬의 경우는 자주 호출되고 시간이 많이 소요되는 루틴들을 연속적으로 내부 메모리에 배치하는 것이 L1P 캐쉬의 히트 율을 개선하며, L1D 캐쉬의 경우는 사용하는 데이터의 크기를 조절하므로 써 쉽게 히트 율을 개선할 수 있다는 것을 밝혔다. 본 논문의 연구 결과는 고성능 DSP 에 멀티미디어 스트림 처리 응용을 최적화로 구현하는데 도움을 줄 것으로 기대한다.