• 제목/요약/키워드: System Integrator

검색결과 210건 처리시간 0.033초

전압제어 주파수가변 적분기 및 3차 체비세프 CMOS 전류모드 필터 설계 (Design of A Voltage-controlled Frequency Tunable Integrator and 3rd-order Chebyshev CMOS Current-mode Filter)

  • 방준호;이우춘
    • 한국산학기술학회논문지
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    • 제11권10호
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    • pp.3905-3910
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    • 2010
  • 본 논문에서는 3차 체비세프 전류모드 필터가 1.8V-$0.18{\mu}m$ CMOS 파라메터로써 설계되었다. 전류모드 필터의 기본 회로는 제안된 전압제어 주파수 가변 전류모드 적분기로 구성되었다. 제안된 전류모드 적분기를 사용함으로써 필터의 차단주파수가 가변될 수 있으며 또한 전체 소비전력을 줄 일 수 있다. HSPICE 시뮬레이션 결과, 필터의 차단주파수는 1.2MHz에서 10.1MHz로 조절되었고 전체 소비전력은 1.8V 공급전압에서 2.85mW으로 확인되었다.

전동기 구동 시스템에서의 적분기 포화 방지를 위한 새로운 안티-와인드업 기법 (The New Anti-Windup Strategy for an Integrator Saturation Protect of a Motor Driving System)

  • 조내수;김우현
    • 전기학회논문지P
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    • 제58권3호
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    • pp.270-275
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    • 2009
  • In a high performance motor driving system, PI controller which is simple implementation is frequently used. But, PI controller has various problems because of an integrator saturation. Therefore, the various methods of an anti-windup have been studied to solve such problems. But, conventional anti-windup methods have still problem with large overshoot and long settling time in the driving conditions. In this paper, to improve such problem, it is proposed a new anti-windup strategy. Using LPF and PI controller, it is improved an overshoot and reduced settling time. Simulation results have verified usefulness of the proposed method using MATLAB/Simulink.

새로운 전류모드 적분기를 갖는 다중 채널 CMOS 저전압 전류모드 필터 설계 (A Multi-channel CMOS Low-voltage Filter with Newly Current-mode Integrator)

  • 이우춘;방준호
    • 한국산학기술학회논문지
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    • 제10권12호
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    • pp.3638-3644
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    • 2009
  • 본 논문에서는 새롭게 제안한 선형 캐스코드 전류모드 적분기를 기본으로 구성된 다중채널 CMOS 저전압 전류모드 필터를 설계하였다. 제안된 전류모드 적분기는 기존의 전류미러형 전류모드 적분기 비해서 높은 전류이득 및 단위이득 주파수 특성을 얻을 수 있다. 5차 체비셰프 함수로써 구성한 필터는 신호흐름선도(SFG)기법에 의하여 능동필터로 변환되었다. 1.8V-$0.18{\mu}m$ CMOS 공정파라미터를 사용한 HSPICE 시뮬레이션 결과, 설계된 필터는 0.51MHz에서 7.03MHz대역까지의 주파수 조정범위를 가지며 Bluetooth, DECT, WCDMA의 3채널의 기저대역에서 사용할 수 있음을 확인하였다.

이중-적분을 이용한 용량형 센서용 스위치드-캐패시터 인터페이스 (A Switched-Capacitor Interface Based on Dual-Slope Integration)

  • 정원섭;차형우;류승용
    • 대한전자공학회논문지
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    • 제26권11호
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    • pp.1666-1671
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    • 1989
  • A novel switched-capacitor circuit for interfacing capacitive microtransducers with a digital system is developed based on the dual-slope integration. It consists of a differential integrator and a comparator. Driven by the teo phase clock, the circuit first senses the capacitance difference between the transducer and the reference capacitor in the form of charge, and accumulates it into the feedback capabitor of the integrator for a fixed period of time. The resulant accumulated charge is next extracted by the known reference charge until the integrator output voltage refurns to zero. The length of time required for the integrator output to return to zero, as measured by the number of clock cycle gated into a counter is proportional to the capacitance difference, averaged over the integration period. The whole operation is insensitive to the reference voltage and the capacitor values involved in the circuit, Thus the proposed circuit permits an accurate differental capacitance measurement. An error analysis has showh that the resolution as high as 8 bits can be expected by realizing the circuit in a monolithic MOS IC form. Besides the accuracy, it features the small device count integrable onto a small chip area. The circuit is thus particularly suitadble for the on-chip interface.

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Software Radio용 전압제어 주파수가변 CMOS 전류모드 필터 (A Voltage-controlled Frequency Tunable CMOS Current-mode Filter for Software Radio)

  • 방준호;유인호;유재영
    • 전기학회논문지
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    • 제60권4호
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    • pp.871-876
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    • 2011
  • In this paper, a voltage-controlled frequency tunable current-mode integrator and a 3rd-order current-mode Chebyshev filter in 1.8V-$0.18{\mu}m$ CMOS is realized for software radio applications in system-on-chips. This filter is used for reconstruction purposes between a current-steering DAC and a current-mode mixer. Power consumption of the designed filter can be reduced by using a current-mode small size integrator. And also, cutoff frequency of this filter is variable between 1.2MHz and 10.1MHz, the power consumption is 2.85mW. And the voltage bias compensated circuit is used to control the voltage variation.in the designed filter.

SRM 센서리스 구동시스템을 위한 적응 슬라이딩 모드 관측기 연구 (A Study of Adaptive Sliding Mode Observer for a Sensorless Drive System of SRM)

  • 오주환;이진우;권병일
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제53권12호
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    • pp.691-699
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    • 2004
  • SRM(Switched Reluctance Motor) drives require the accurate position information of the rotor. These informations are generally provided by a tacho generator or digital shaft-position encoder These speed sensors lower the system reliability and require special attention to noise. This paper describes a new approach to estimating SRM speed from measured terminal voltages and currents for speed sensorless control. The described method is based on the sliding mode observer. The rotor speed and position observers are estimated by the adaptation law using the real and estimated currents. However, the conventional adaptive sliding mode observer based on the variable structure control theory has some disadvantages that the estimated values including the high-frequency chattering and the steady state error generated due to the infinite feedback gain chosen and the discontinuous control input. To reduce the chattering and steady state error, an integrator is also inserted in the sliding mode observer strategy. The described adaptive sliding mode observer decreases the vibration to the switching hyper-plane of the sliding mode by adding integrator. The described methodology incorporates the Lyapunov algorithm to drive the rotor speed and the stator resistance such that it can overcome the problem of sensitivity in the face of SRM parameter variation. Also, without any mechanical information. The rotor speed of SRM is obtained form adaptive scheme. The described method is verified through the simulation and experiment.

아날로그 적분기를 이용한 맥동전압 보상형 순시추종 PWM 제어기를 적용한 인버터 (Ripple Voltage Compensation Instantaneous Follow Controller of Inverter by using Analog Integrator)

  • 라병훈;이현우;김광태
    • 전력전자학회논문지
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    • 제9권4호
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    • pp.381-389
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    • 2004
  • 본 논문에서는 입력단 커패시터를 제거한 인버터의 제어에 아날로그 적분기를 이용한 새로운 비선형 제어 기법인 순시보상형 PWM 제어회로를 적용하고 있다. 비선형 순시보상형 PWM 제어기는 순시 입력전압의 변동에 대한 보상과 제어기준값에 대한 추종이 스위칭 한 주기 내에서 이루어지는 다이나믹하고 강인한 응답성을 가지고 있으며, 아날로그 소자를 사용하고 있어 제어회로가 간단하면, 인버터 입력 맥동전압을 보상함으로 대형의 평활용 커패시터가 필요치 않아서 소형, 저가형으로 부피가 적은 인버터를 제작 할 수 있다는 장점을 가지고 있다. 이러한 장점을 가지고 있는 순시보상형 PWM 제어 인버터를 기존의 VVVF 제어형 전동기 인버터 시스템을 대치하여 저가이고 소형의 인버터 시스템으로 제안하고 실험을 통하여 우수한 동작특성을 확인하고 있다.

An integrator based wind speed estimator for wind turbine control

  • Elmaati, Younes Ait;El Bahir, Lhoussain;Faitah, Khalid
    • Wind and Structures
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    • 제21권4호
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    • pp.443-460
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    • 2015
  • In this paper, an integrator based method to estimate the effective wind speed in wind turbine systems is proposed. First, the aerodynamic torque was accurately estimated through a proportional gain based observer where the generator speed is the measured output of the system. The torque signal contains not only useful frequencies of the wind, but also high frequencies and the ones due to structural vibration. The useful information of the wind signal is low frequency. A spectral analysis permitted the determination of the useful frequencies. The high frequencies were then filtered before introducing the torque signal in the wind speed observer. The desired effective wind speed was extracted through an integrator based observer using the previously estimated aerodynamic torque. The strength of the method is to avoid numerical solutions used in literature of the wind speed estimation. The effectiveness of the proposed wind speed estimator and its use to control the generator speed has been tested under turbulent situations using the FAST software (Fatigue, Aerodynamics, Structures, and Turbulence), for large scale Megawatt turbine.

잡음영향의 저감을 위한 두 디지털 필터들의 사용에 의한 DFT 기반의 계통주파수 추정 (DFT-based Power System Frequency Estimation using Two Digital Filters for Noise Effect Reduction)

  • 황진권
    • 전기학회논문지
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    • 제62권7호
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    • pp.891-897
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    • 2013
  • The power system frequency plays an important role in monitoring and controlling the power system. The frequency can be measured through discrete Fourier transform (DFT) coefficients of its positive fundamental frequency. The accuracy of the frequency estimate is severely affected by noise in the power system signal and the leakage effect of the negative fundamental frequency in DFT. This paper proposes a DFT-based frequency estimation algorithm to cope with the noise as well as the leakage effect. In this algorithm, two suitable digital filters are introduced to reduce efficiently frequency estimate error due to the noise. These filters are designed to use a digital bandpass filter and a second-degree integrator. The effectiveness of the proposed algorithm in reduction of frequency estimate error is verified through simulations on noise, harmonics and frequency deviation.

Quantized System Modeling and Performance Evaluation

  • Lee, Jong-Sik
    • 한국시뮬레이션학회:학술대회논문집
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    • 한국시뮬레이션학회 2003년도 추계학술대회 및 정기총회
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    • pp.87-93
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    • 2003
  • This paper reviews existing message-filtering schemes and presents a quantization-based message-filtering approach which reduces state update transmission and message traffic requirement. For a realization of the approach we develop a DEVS-based integrator which provides behavior and characteristic of the quantization-based approach. We take a spaceship and space traveling system as a case study to evaluate performance of the quantization-based approach. The approach is validated by DEVSJAVA simulations of the case study. The comparison of message traffic requirement between DTSS (Discrete Time System Specification)-based and DEVS-based systems apparently shows system performance improvement through the quantization-based approach.

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