• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.1021-1024
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• 1998

Computer-aided design of VLSI circuits is usually carried out in three synthesis steps; high-level synthesis, logic synthesis and layout synthesis. Each synthesis step is further kroken into a few optimization problems. In this paper we study the area minimization problem in floorplanning(also known as the floorplan sizing problem). We propose the area minimization algorithms for general floorplans.

• 전자공학회논문지A
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• 제33A권10호
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• pp.195-204
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• 1996

We suggest a transform method form asynchronous finite state machines (AFSMs) into signal transition graphs (STGs) for speed-independent circuit synthesis. Existing works synthesize nodes in the state graph increases exponentially as the number of input and output signals increases. To overcome the problem of the exponential data complexity, we transform AFSMs into STGs so that the previous synthesis algorihtm form STGs can be applied.Accoridng to the experimental results, it turns out that our synthesis method produces more efficient circuit than the previous synthesis methods.

• Bulletin of the Korean Chemical Society
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• 제34권12호
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• pp.3777-3781
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• 2013

A formal total synthesis of aliskiren was accomplished. A key in our synthesis was to use the symmetric ciscisoid-cis-bis-lactone 3' as a precursor, which was prepared from D-tartrate diester. Appending the end groups and functional group transformations completed the synthesis.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.105-108
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• 2002

Although asynchronous designs have become a promising way to develop complex modern digital systems, there is a few complete design framework for VLSI designers who wish to use automatic CAD tools. Especially, high-level synthesis is not widely concerned until now. In this paper we Proposed a method for high-level synthesis of asynchronous systems as a part of an asynchronous design framework. Our method performs scheduling, allocation, and binding, which are three subtasks of high-level synthesis, in simultaneous using a transformational approach. To deal with complexity of high-level synthesis we use neighborhood search algorithm such as Tabu search.

• ETRI Journal
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• 제31권4호
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• pp.457-459
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• 2009

The optimum maximum voiced frequency (MVF) estimation-based two-band excitation for hidden Markov model-based speech synthesis is presented. An analysis-by-synthesis scheme is adopted for the MVF estimation which leads to the minimum spectral distortion of synthesized speech. Experimental results show that the proposed method significantly improves synthetic speech quality.

• Toxicological Research
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• 제15권1호
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• pp.35-38
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• 1999

RNA synthesis rate was measured at different time points after UV irradiation in various xeroderma pigmentosum (XP) cells including complementation groups F and G. The RNA synthesis was assayed by measuring 3H-uridine incorporation. In normal cells, recovery of RNA synthesis was initiated at about 6 hr ager UV irradiation and reached to the same level as in unirradiated cells at 24hr after UV irradiation. By contrast, no such recovery was observed in group F,G XP cells.

• Bulletin of the Korean Chemical Society
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• 제25권6호
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• pp.927-930
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• 2004

• 대한화학회지
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• 제55권2호
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• pp.153-156
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• 2011

• Bulletin of the Korean Chemical Society
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• 제30권11호
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• pp.2809-2811
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• 2009

• 한국산업융합학회 논문집
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• 제3권4호
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• pp.299-306
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• 2000

이 논문은 파이프라인 함성을 위한 상위수준 데이터 경로 하성과 콘트롤 합성의 통합에 관한 연구이다. 현재 대부분의 상위수준 합성 방법은 콘트롤 영역의 영향을 무시하는데 보다 나은 설계를 위하여 데이터 경로디자인 영역과 콘트롤 디자인 영역을 통합하여 탐색하는 파이프라인 상위수준함성 도구를 구현했다. 이 도구는 비용 제한 하에서 최고 성능의 파이프라인을 합성하는 비용재한합성과 성능 제한 하에서 최서 비용의 파이프라인을 합성하는 성능 제한합성의 두 가지 방식을 제공한다.