• The KIPS Transactions:PartD
• /
• v.13D no.2 s.105
• /
• pp.175-182
• /
• 2006

Radars are used to detect the motion of the low flying enemy planes in the military. Radar-detected raw data are first processed and then inserted into the ground tactical C4I system. Next, these data we analyzed and broadcasted to the Shooter system in real time. But the accuracy of information and time spent on the displaying and graphical computation are dependent on the operator's capability. In this paper, we propose the Flying Object Tracking Management System that allows the displaying of the objects' trails in real time by using data received from the radars. We apply the coordinate system translation algorithm, existing communication protocol improvements with communication equipment, and signal and information computation process. Especially, radar signal duplication computation and synchronization algorithm is developed to display the objects' coordinates and thus we can improve the Tactical Air control system's reliability, efficiency, and easy-of-usage.

• Journal of Broadcast Engineering
• /
• v.15 no.2
• /
• pp.182-191
• /
• 2010

In this paper, a simple Carrier Frequency Recovery(CFR) scheme is introduced. In relating the use of consumer-grade equipment and satellite transmission environments, carrier frequency recovery have to recovery a large initial Carrier Frequency Offset(CFO), which is 20% normalized CFO, for DVB-S2 receivers. For these reasons, conventional CFR schemes for DVB-S2 systems need significant hardware complexity. Introduced CFR scheme employs Fitz algorithm for coarse CFR and recovers a coarse CFO accurately, and a simple pilot block correlation algorithm is employed for fine CFR. Introduced scheme reduce the number of multiplication operations by 80% and does not need any additional memory without degrading the achievable performance.

• Journal of Navigation and Port Research
• /
• v.41 no.4
• /
• pp.173-180
• /
• 2017

Underwater communications are degraded as a result of inter symbol interference in multipath channels. Therefore, a channel coding scheme is essential for underwater communications. Packets consist of a PN sequence and a data field, and the uncoded PN sequence is used to estimate the frequency and phase offset using a Doppler and phase estimation algorithm. The estimated frequency and phase offset are fed to a coded data field to compensate for the Doppler and phase offset. The PN sequence is generally utilized to acquire the synchronization information, and the bit error rate of an uncoded PN sequence predicts the performance of the coded data field. To ensure few errors, we resort to powerful BCJR decoding algorithms of convolutional codes with rates of 1/2, 2/3, and 3/4. We use this powerful channel coding algorithm to present an efficient receiver structure based on the relation between the bit error of the uncoded PN sequence and coded data field in computer simulations and lake experiments.

• The KIPS Transactions:PartC
• /
• v.13C no.3 s.106
• /
• pp.369-374
• /
• 2006

This paper related with the performance improvement of adaptive equalizer that is a based on the tricepstrum eqalization algorithm by using the received signal. Adaptive equalizer used for the improvement of communication performance, like as high speed, maintain of synchronization, BER, at the receive side in the environment of communication channel of the presence of the aditive noise, phase distortion and frequency selective fading, mainly. It's characteristics are nearly same as the inverse characterstics of the communication channel. In this paper, the TEA algorithm using the HOS and the 16-QAM which is 2-dimensional signaling method for being considered signal was used. For the precoding of 16-QAM singnal in the assignment of the signal costellation, Gray code was used, and the improvement of performance was gained by computer simulation in the residual intersymbol interence and mean squared error which is representive measurement of adaptive equalizer.

• Transactions of the Korean Society of Mechanical Engineers A
• /
• v.40 no.9
• /
• pp.801-805
• /
• 2016

In this paper, engine clutch engagement shock is analyzed during the mode change of plug-in hybrid electric vehicles. Multi-driving mode includes the EV (electric vehicle) mode, HEV (hybrid electric vehicle) mode, and engine operating mode. Depending on the mode change, the engine clutch is either engaged or disengaged. The magnitude of shock during clutch engagement is very important because it impacts vehicle acceleration and clutch synchronization speed, which affects ride comfort substantially. The performance simulator of plug-in hybrid electric vehicles was developed using MATLAB/Simulink. The simulation results show that the mode change control algorithm is necessary for minimizing shock during clutch engagement.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.38 no.1
• /
• pp.69-78
• /
• 2001

This paper presents the design and FPGA implementation of a FLEX PSP(Protocol Signal Processor) for the portable high speed paging system. In this approach, two algorithms are newly proposed for implementing the PSP which provides capabilities of the maximum 6,400bps at speed, high-channel throughput, real time error correction and an effective frame search function. One is an accurate symbol synchronization algorithm which is applied for synchronizing the interleaved 4-level bit symbols which are received at input stage of A/D converter, and the other is a modified fast decoding algorithm which is provided for realizing double error correction of (31,21)BCH signal. The PSP is composed of six functional modules, and each module is modelled in VHDL(VHSIC Hardware Description Language). Both functional simulation and logic synthesis have performed for the proposed PSP through the use of Synopsys$^{TM}$ tools on a Axil-320 Workstation, and where Altera 10K libraries are used for logic synthesis. From logic synthesis, we can see that the number of gates is about 2,631. For FPGA implementation, timing simulation is performed by using Altera MAX+ PLUS II, and its results will be also given. The PSP which is implemented in 6 FPGA devices on a PCB has been verified by means of Logic Analyzer.r.

• Journal of KIISE:Information Networking
• /
• v.29 no.1
• /
• pp.97-107
• /
• 2002

In general, under interactive broadcasting environment, user finds additional service using top-down menu. However, user can't know that additional service provides information until retrieval has finished and top-down menu requires multi-level retrieval. This paper proposes the new method for additional service providing not using top-down menu but using object selection. For the purpose of this method, the movie of a MPEG should be synchronized with the object information(position, size, shape) and object tracking technique is required. Synchronization technique uses the Directshow provided by the Microsoft. Object tracking techniques use a motion-based tracking and a model-based tracking together. We divide object into two parts. One is face and the other is substance. Face tracking uses model-based tracking and Substance uses motion-based tracking base on the block matching algorithm. To improve precise tracking, motion-based tracking apply the temporal prediction search algorithm and model-based tracking apply the face model which merge ellipse model and color model.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.29 no.10
• /
• pp.73-82
• /
• 2015

This paper proposes an ripple reduction algorithm and analyzes the effects of offset and scale errors generated by voltage sensor while measuring grid voltage in grid-tied single-phase inverters. Generally, the grid-connected inverter needs to detect the phase angle information by measuring grid voltage for synchronization, so that the single-phase inverter can be accurately driven based on estimated phase angle information. However, offset and scale errors are inevitably generated owing to the non-linear characteristics of voltage sensor and these errors affect that the phase angle includes 1st harmonic component under using SRF-PLL(Synchronous Reference Frame - Phase Locked Loop) system for detecting grid phase angle. Also, the performance of the overall system is degraded from the distorted phase angle including the specific harmonic component. As a result, in this paper, offset and scale error due to the voltage sensor in single-phase grid connected inverter under SRF-PLL is analyzed in detail and proportional resonant controller is used to reduce the ripples caused by the offset error. Especially, the integrator output of PI(Proportional Integral) controller in SRF-PLL is selected as an input signal of the proportional resonant controller. Simulation and experiment are performed to verify the effectiveness of the proposed algorithm.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.49 no.1
• /
• pp.39-45
• /
• 2012

In this paper, a distributed 2-hop routing algorithm is proposed. The main purpose of the proposed algorithm is to reduce the overall power consumption of each sensor node so that the lifetime of WSN(wireless sensor network) is prolonged. At the beginning of each round, the base station transmits a synchronization signal that contains information on the priority table that is used to decide whether each sensor node is elected as a cluster head or not. The priority table is constructed so that sensor nodes closer to half energy distance from the base station get the higher priority. 2-hop routing is done as follows. Cluster heads inside half energy distance from the base station communicate with the base station directly. Those outside half energy distance have to decide whether they choose 2-hop routing or 1-hop routing. To do this, each cluster head outside half energy distance calculates the energy consumption needed to communicate with the base station via 1-level cluster head or directly. If less energy is needed when passing through the 1-level cluster head, 2-hop routing is chosen and if not, 1-hop routing is chosen. After routing is done each sensor nodes start sensing data.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.47 no.6
• /
• pp.48-56
• /
• 2010

Recently, we need to dramatically speed up real-time video encoding and decoding on mobile devices because complexity of video CODEC is significantly increasing along with the demand for multimedia service of high-quality and high-definition videos by users. A variety of research is conducted for parallelism of video processing using newly developed multi-core platforms. In this paper, we propose a method of parallelism based on slice partition of video compression CODEC. We propose a novel concept of a parallel slice for parallelism and propose a new coding order to be adequate to the parallel slice which keeps high coding efficiency. To minimize synchronization time of multiple parallel slices, we also propose a synchronization method to determinate whether the parallel slice could be independently decoded or not. Experimental results shows that we achieved 27.5% (40.7%) speed-up by parallelism with bit-rate increase of 3.4% (2.7%) for CIF sequences (720p sequences) by implementing the proposed algorithm on the H.264/AVC.