• 전자공학회논문지 IE
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• 제48권1호
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• pp.30-35
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• 2011

본 논문은 MB-OFDM UWB 시스템용 초기 채널 추정의 성능을 향상시키는 방법을 제안한다. 초기 채널 추정의 성능은 채널 추정에 활용되는 프리엠블 심볼의 수가 커짐에 따라 증가된다. MB-OFDM UWB 표준안은 프리엠블 형식에서 부대역 당 2개의 채널 추정용 심볼 (CE symbol : channel estimation symbol)을 제시한다. 2 개 심볼에 기반한 채널 추정의 성능은 각각 200 Mbps와 480 Mbps 전송율에 대한 -77.5 dBm과 -72.5 dBm의 상당적으로 높은 수신 감도에서는 만족될 수 있지만, 55 Mbps와 110 Mbps 전송율에 대한 수신 감도 -83.5 dBm과 -80.5 dBm에서 채널 추정 성능은 저하될 수 있다. 본 논문에서 제안하는 방법은 초기 채널 추정 영역을 기존 2개의 채널 추정용 심볼을 포함하여 패킷 동기 심볼 (PS symbol : packet synchronization symbol)과 프레임 동기 심볼 (FS symbol : frame synchronization symbol)로 확장함으로써 성능 향상을 얻을 수 있는 방법이다. 이 방법은 저하된 SBR에서 초기 채널 추정 성능을 향상시키고 물리 계층 헤더 (physical-layer header)에서의 오류율를 감소시킬 수 있다. 그러므로, 제안한 방법에 기반한 링크 마진의 증가는 통신 처리량을 증가시키는 효과가 있다. 초기 채널 추정에 대해 제안된 방법에 대한 시뮬레이션 결과, 단지 2개의 CE 심볼만을 사용했을 때보다 CE 심볼 포함 1 개의 심볼을 확장한 4 개 심볼 기반의 초기 채널 추정 방식의 성능이 $10^{-4}$ BER에서 약 0.7 dB 만큼 향상된 성능을 가진다.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 2003년도 ISIS 2003
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• pp.575-578
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• 2003

In this paper, we introduce a hyper-chaos secure communication method using Hyper-chaos consist of State-Controlled Cellular Neural Network (SC-CNN). A hyper-chaos circuit is created by applying identical n-double scroll with weak coupled method to each cell. Hyper-chaos synchronization was achieved using embedding synchronization between the transmitter and receiver about in SC CNN. And then, we accomplish secure communication by synthesizing the desired information with a hyper-chaos circuit by embedding the information signal to the only one state variable instead of all state variables in the driven-synchronization method. After transmitting the synthesized signal to the identical channel, we confirm secure communication by separating the information signal and the hyper-chaos signal in the receiver.

• Journal of information and communication convergence engineering
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• 제8권1호
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• pp.64-70
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• 2010

In this paper, we study and develope a special secure Dongle to be adapted in GSM SmartPhone for secure voice communication to the serial 20-pin connector in SmartPhone. We design and implement the Dongle module hardware, firmware, and software including cipher crypto-synchronization and cipher algorithm. Also we study and emulate the SmartPhone GUI software interface including communication software module to the Dongle. Finally, we analyze the performances of crypto-synchronization in some noisy environment and also we test the secure Dongle module.

• 전자공학회논문지A
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• 제33A권5호
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• pp.10-23
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• 1996

In this paper, the reverse link performance evaluation with synchronous CDMA is analyzed in the PCS system, which is the schem based on proposed method of KMT-PCS to increase the capacitance of cellular CDMA system. We make the baseband system model of CDMA reverse link, and then analyze system performance and subsystem techniques considering effect of channel and power control that are improtant factor influencing system performance in the PCS system. Based on this result, the paper presents primary technique analyses required at synchronous reverse link proposed by the KMT, which compose of initial synchronization range in initial synchronization step and control signal period in the synchronization maintenance step.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 하계종합학술대회 논문집
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• pp.86-89
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• 1999

In this paper, we propose a new architecture of the fast symbol timing synchronization system which has some shared hardware blocks in order to reduce the hardware complexity. The proposed system consists of received power detector, correlation power detector using shared complex moving adders, and 2-step peak detector. Our system has detected FFT starting point within three Symbols using first two reference symbols of the frame in wireless ATM system. The new architecture was designed and simulated using VHDL. Our proposed architecture also detects a correct symbol timing synchronization within three symbols under a multi-path fading channel.

• 한국통신학회논문지
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• 제22권7호
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• pp.1477-1486
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• 1997

Conventioally the decoding methods and the design of coset codes for burst synchronization and error detection have been based on the concept that slips occuring to the right or to the left with respect to a reference timing are corrected. In this paper we newly approach to the design of coset codes relying on the condition that only a single code word can exists in an observation interval, which provides an extentended view on the conventional approach. A theorem concerning the condition is presented. A combined burst synchronization and error detection system with maximum slip correction capability have been devised based on the theorem and a detection method is falsely accepted in the presented of channel errors. The false acceptance probabilities of the system are derived and its performance is analyzed through computer computation using the derived results.

• 한국통신학회논문지
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• 제21권7호
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• pp.1833-1841
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• 1996

Recently, by emerging of the ALE techniques that make it possible to providereliable communications link automatically, high frequency communiation is newly used as emergency communication and back-up for satellite communications. ALE signal is transmitted in burst, and the received signal is subject to distortions by detrimental multipath fading channels. In the case of that channel, the performance of ALE system is highly dependent upon that of synchronization techniques. In this paper, M-ary FSK signals are detected by a bank of bandpass filter, which is implemented using recusive DFT(Discrete Fourier Transform). Also an acquisition and trancking algorithm are designed uisng parallel structure and early-late-gate methods respectively. Finally, we verify the performance ofthe proposed synchronization algorithm by the computer simulation.

• 한국군사과학기술학회지
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• 제14권6호
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• pp.1043-1048
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• 2011

In this paper, a newsynchronization technique applied to burst-mode communication is proposed. A synchronization technique is to estimate carrier frequency and phase offsets in a noisy channel environment. A fundamental problem for estimating the parameters(carrier phase and frequency offsets) in burst-mode transmission is that the ways of pursuing estimation accuracy and transmission efficiency are always trade-off. To solve this problem, a new carrier recovery technique is proposed to improve the transmission efficiency with reliable performance especially at low S/N. In the proposed technique, the synchronization parameters are first estimated based on a data-aided feed-forward estimation scheme. Then, a phase tracker using decision-directed DPLL estimates the phase offset for the data portion of the burst data. From simulation results, it shows fast synchronization with shorter preamble maintaining reasonable BER performance at low S/N.

• Journal of Communications and Networks
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• 제2권1호
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• pp.58-68
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• 2000

In this paper we introduce the correlation-aided distributed sample acquisition (CDSA) scheme for fast cell search in IMT-2000 W-CDMA cellular system. The proposed scheme incorporates the state symbol correlation process into the comparison-correction based synchronization process of the original DSA scheme to enable fast acquisition even under very poor channel environment. for its realization, each mobile station (MS) has to store in its memory a set of state sample sequences. which are determined by the long-period scrambling sequences used in the system and the sampling interval of the state samples. CDSA based cell search is carried out in two stages : First, the MS first acquires the slot timing by using the primary synch code (PSC) and then identifies the igniter code which conveys the state samples of the current cell . Secondly. the MS identifies the scrambling code and frame timing by taking the comparison-correction based synchronization approach and, if the identification is not done satisfactorily within preset time. it initiates the state symbol correlation process which correlates the received symbol sequence with the pre-stored state sample sequences for a successful identification. As the state symbol SNR is relatively high. the state symbol correlation process enables reliable synchronization even in very low chip-SNR environment. Simulation results show that the proposed CDSA scheme outperforms the 3GPP 3-step approach, requiring the signal power of about 7 dB less for achieving the same acquisition time performance in low-SNR environments. Furthermore, it turns out very robust in the typical synchronization environment where large frequency offset exists.

• 한국통신학회논문지
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• 제30권10A호
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• pp.922-929
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• 2005

본 논문에서는 직접대역 확산 통신 기법을 사용하는 이동통신 시스템에서 하향링크상의 무선신호를 이용하여 오버헤드 채널상의 정보를 취득하고 이 정보를 이용하여 파일롯 채널을 생성함으로써 기지국 간 하드핸드오프를 가능하게 하는 적응형 파일롯 비콘 장치를 제안한다. 본 적응형 파일롯 비콘 장치는 무선 신호 중에서 파일롯 채널 만을 선별하여 생성 및 전송하므로 상대적으로 낮은 전력으로 서비스가 가능하며, CDMA 수신부에서 하향링크상의 파일롯 채널로부터 기지국의 시간동기 및 주파수 동기를 획득하여 장치의 오프셋을 보정하므로 GPS에 의한 시간동기가 필요하지 않으며 기지국 순방향 신호의 수신이 가능한 임의의 장소에 설치가 가능한 장점이 있다. CDMA수신기에서 하향링크 파일롯 신호를 탐색하는 파일롯 서처는 FPGA와 DSP를 이용하며, FPGA에서 구현된 파일롯 서처는 초기동기 획득용으로 사용되곤 DSP에서 구현되는 파일롯 서처는 비콘장치의 클럭과 기지국 장치의 클럭사이에 발생하는 오프셋 오차를 보정하는 역할을 수행한다. 적응형 파일롯 비콘 장치의 CDMA 송신부는 CDMA 수신부에서 취득한 파일롯 채널의 시간정보인 타임오프???V을 이용하여, 기지국에 동기된 하향링크 파일롯 신호를 생성한다. FIR필터를 통하여 출력된 1차 중간주파신호는 RF모듈웨서 상향변환된 후 고출력증폭기와 안테나를 통하여 방사하게 된다.