• Title/Summary/Keyword: Symbol Information

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Linear versus Non-linear Interference Cancellation

  • Buehrer, R.Michael;Nicoloso, Steven P.;Gollamudi, Sridhar
    • Journal of Communications and Networks
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    • v.1 no.2
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    • pp.118-133
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    • 1999
  • In this paper we compare linear and non-linear inter-ference cancellation for systems employing code division multi-ple access (CDMA) techniques. Specifically, we examine linear and non-linear parallel interference cancellation(also called multi-stage cancellation) in relationship to other multiuser detection al-gorithms. We show the explicit relationship between parallel inter-ference cancellation and the decorrelator (or direct matrix inver-sion). This comparison gives insight into the performance of paral-lel interference cancellation (PIC) and leads to vetter approaches. We also show that non-linear PIC approaches with explicit chan-nel setimation can provide performance improvement over linear PIC, especially when using soft non-linear symbol estimates. The application of interference cancellation to non-linear modulation techniques is also presented along with a discussion on minimum mean-squared error(MMSE) symbol estimation techniques. These are shown to further improve the performance of parallel cancella-tion.

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Architecture Design of the Symbol Timing Synchronization System with a Shared Architecture for WATM using OFDM (공유 구조를 가지는 OFDM 방식의 무선 ATM 시스템을 위한 심볼 시간 동기 블록의 구조 설계)

  • 이장희;곽승현;김재석
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.86-89
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    • 1999
  • In this paper, we propose a new architecture of the fast symbol timing synchronization system which has some shared hardware blocks in order to reduce the hardware complexity. The proposed system consists of received power detector, correlation power detector using shared complex moving adders, and 2-step peak detector. Our system has detected FFT starting point within three Symbols using first two reference symbols of the frame in wireless ATM system. The new architecture was designed and simulated using VHDL. Our proposed architecture also detects a correct symbol timing synchronization within three symbols under a multi-path fading channel.

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An Analysis of Bit Error Probability of Reed-Solomon/Trellis concatenated Coded-Modulation System (Reed-Solomon/Trellis 연접 부호변조 시스템의 비트오율 해석)

  • 김형락;이상곤;문상재
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.9
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    • pp.34-43
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    • 1994
  • The unequal symbol error probability of TCM(trellis coded modulation) is analyzed and applied to the derivation of bit error probability of /RS/Trellis concatenated coded-modulation system. An upper bound of the symbol error probability of TCM concatenated with RS code is obtained by exploiting the unequal symbol error probability of TCM, and it is applied to the derivation of the upper bound of the bit error probability of the RS/Trellis concatenated coded-modulation system. Our upper bounds of the concatenated codes are tighter than the earlier established other upper bounds.

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Logic gate implementation of constant amplitude coded CS/CDMA transmitter (정포락선 부호화된 CS-CDMA 송신기의 논리 게이트를 이용한 구현)

  • 김성필;류형직;김명진;오종갑
    • Proceedings of the IEEK Conference
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    • 2003.11c
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    • pp.281-284
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    • 2003
  • Multi-code CDMA is an appropriate scheme for transmitting high rate data. However, dynamic range of the signal is large, and power amplifier with good linearity is required. Code select CDMA (CS/CDMA) is a variation of multi-code CDMA scheme that ensures constant amplitude transmission. In CS/CDMA input data selects multiple orthogonal codes, and sum of these selected codes are MPSK modulated to convert multi-level symbol into different carrier phases. CS/CDMA system employs level clipping to limit the number of levels at the output symbol to avoid hish density of signal constellation. In our previous work we showed that by encoding input data of CS/CDMA amplitude of the output symbol can be made constant. With this coding scheme, level clipping is not necessary and the output signal can be BPSK modulated for transmission. In this paper we show that the constant amplitude coded(CA-) CS/CDMA transmitter can be implemented using only logic gates, and the hardware complexity is very low. In the proposed transmitter architecture there is no apparent redundant encoder block which plays a major role in the constant amplitude coded CS/CDMA.

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A 2-D Barcode Detection Algorithm based on Local Binary Patterns (지역적 이진패턴을 이용한 2차원 바코드 검출 알고리즘)

  • Choi, Young-Kyu
    • Journal of the Semiconductor & Display Technology
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    • v.8 no.2
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    • pp.23-29
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    • 2009
  • To increase the data capacity of one-dimensional symbology, 2D barcodes have been proposed a decade ago. In this paper, a new 2D barcode detection algorithm based on Local Binary Pattern is presented. To locate 2D barcode symbols, a texture analysis scheme based on the Local Binary Pattern is adopted, and a gray-scale projection with sub-pixel operation is utilized to separate the symbol precisely from the input image. Finally, the segmented symbol is normalized using the inverse perspective transformation for the decoding process. The proposed method ensures high performances under various lighting/printing conditions and strong perspective deformations. Experiments show that our method is very robust and efficient in detecting the symbol area for the various types of 2D barcodes.

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Multi-Symbol Binary Arithmetic Coding Algorithm for Improving Throughput in Hardware Implementation

  • Kim, Jin-Sung;Kim, Eung Sup;Lee, Kyujoong
    • Journal of Multimedia Information System
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    • v.5 no.4
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    • pp.273-276
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    • 2018
  • In video compression standards, the entropy coding is essential to the high performance compression because redundancy of data symbols is removed. Binary arithmetic coding is one of high performance entropy coding methods. However, the dependency between consecutive binary symbols prevents improving the throughput. For the throughput enhancement, a new probability model is proposed for encoding multi-symbols at one time. In the proposed method, multi-symbol encoder is implemented with only adders and shifters, and the multiplication table for interval subdivision of binary arithmetic coding is removed. Compared to the compression ratio of CABAC of H.264/AVC, the performance degradation on average is only 1.4% which is negligible.

Side Information Transmission using Reference Symbol in PTS Scheme (PTS 방식에서 기준 심볼을 이용한 부가정보 전송)

  • 유흥균;박종현;박진수
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.4
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    • pp.414-420
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    • 2004
  • Partial transmit sequence(PTS) scheme has been widely studied to reduce the peak-to-average power ratio(PAPR) of Orthogonal frequency-division multiplexing(OFDM) signal since it is flexible ad any spectral regrowth is not made. A necessity of the PTS scheme is to transmit the side information about the phase rotation factors for correct OFDM symbol recovery. In this paper, a new side information embedded PTS scheme using the reference symbols is proposed fur the PAPR reduction and the BER(bit error rate) performance is analyzed when the erroneous side information is received. In this proposed method, the information about the rotation factors is expressed by the phase of reference symbols. The proposed method maintains the same PAPR reduction performance as the conventional PTS scheme and OFDM symbols are correctly recovered by the side information to meet the required BER level, which is verified via the computer simulation. Also, it is shown that the proposed method can be easily realized and can be used for all kinds of digital modulation formats in the OFDM communication system.

Turbo MAP Decoding Algorithm based on Radix-4 Method (Radix-4 방식의 터보 MAP 복호 알고리즘)

  • 정지원;성진숙;김명섭;오덕길;고성찬
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.4A
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    • pp.546-552
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    • 2000
  • The decoding of Turbo-Code relies on the application of a soft input/soft output decoders which can be realized using maximum-a-posteriori(MAP) symbol estimator[l]. Radix-2 MAP decoder can not be used for high speed communications because of a large number of interleaver block size N. This paper proposed a new simple method for radix-4 MAP decoder based on radix-2 MAP decoder in order to reduce the interleave block size. A branch metrics, forward and backward recursive functions are proposed for applying to radix-4 MAP structure with symbol interleaver. Radix-4 MAP decoder shall be illustratively described and its error performance capability shall be compared to conventional radix-2 MAP decoder in AWGN channel.

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Fast Modified Zerotree Algorithm (고속 수정 제로트리 알고리즘)

  • 김호식;이복흔;김동욱;유지상
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.6C
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    • pp.785-792
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    • 2004
  • In this paper, we propose a fast and efficient method that improves the performance of embedded zerotree wavelet(EZW) algorithm introduced by Sharipo. In the EZW algorithm, two bits are allocated for a symbol, but it is inefficient for compression and the zerotree coding wastes much time at encoding. In this paper, in order to increase the efficiency of compression, it will be allocated a variable bit for a symbol at each subband. To reduce the encoding time, we use a backscan method and lifting scheme instead of filter bank in wavelet transform. Experimental result are shown that the algorithm suggested in this paper has a better performance about 0.3∼1.5㏈ PSNR while the encoding time was speeded up more than 2-10 times compared with the EZW algorithm.