• 제목/요약/키워드: Switching losses

검색결과 533건 처리시간 0.028초

A Hybrid Modulation Strategy with Reduced Switching Losses and Neutral Point Potential Balance for Three-Level NPC Inverter

  • Jiang, Weidong;Gao, Yan;Wang, Jinping;Wang, Lei
    • Journal of Electrical Engineering and Technology
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    • 제12권2호
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    • pp.738-750
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    • 2017
  • In this paper, carrier-based pulse width modulation (CBPWM), space vector PWM (SVPWM) and reduced switching losses PWM (RSLPWM) for the three-level neutral point clamped (NPC) inverter are introduced. In the case of the neutral point (NP) potential (NPP) offset, an asymmetric disposition PWM (ASPDPWM) strategy is proposed, which can output PWM sequences correctly and suppress the lower order harmonics of the inverter effectively. An NPP balance strategy based on carrier based PWM (CBPWM) is analyzed. A hybrid modulation strategy combining RSLPWM and the NPP balance based on CBPWM is proposed, and hysteresis control is adopted to switch between the two modulation strategies. An experimental prototype of the three-level NPC inverter is built. The effectiveness of the hybrid modulation is verified with a resistance-inductance load and a permanent magnetic synchronous motor (PMSM) load, respectively. The experimental results show that reduced switching losses and an acceptable NPP can be effectively achieved in the hybrid modulation strategy.

Optimized Low-Switching-Loss PWM and Neutral-Point Balance Control Strategy of Three-Level NPC Inverters

  • Xu, Shi-Zhou;Wang, Chun-Jie;Han, Tian-Cheng;Li, Xue-Ping;Zhu, Xiang-Yu
    • Journal of Power Electronics
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    • 제18권3호
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    • pp.702-713
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    • 2018
  • Power loss reduction and total harmonic distortion(THD) minimization are two important goals of improving three-level inverters. In this paper, an optimized pulse width modulation (PWM) strategy that can reduce switching losses and balance the neutral point with an optional THD of three-level neutral-point-clamped inverters is proposed. An analysis of the two-level discontinuous PWM (DPWM) strategy indicates that the optimal goal of the proposed PWM strategy is to reduce switching losses to a minimum without increasing the THD compared to that of traditional SVPWMs. Thus, the analysis of the two-level DPWM strategy is introduced. Through the rational allocation of the zero vector, only two-phase switching devices are active in each sector, and their switching losses can be reduced by one-third compared with those of traditional PWM strategies. A detailed analysis of the impact of small vectors, which correspond to different zero vectors, on the neutral-point potential is conducted, and a hysteresis control method is proposed to balance the neutral point. This method is simple, does not judge the direction of midpoint currents, and can adjust the switching times of devices and the fluctuation of the neutral-point potential by changing the hysteresis loop width. Simulation and experimental results prove the effectiveness and feasibility of the proposed strategy.

Two-transistor 포워드 컨버터에서 소프트 스위칭 기법의 손실 계산

  • Kim Marn-Go
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2001년도 전력전자학술대회 논문집
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    • pp.698-701
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    • 2001
  • Loss analyses of two soft switching techniques for two-transistor forward converters are presented. The sums of snubber conduction and capacitive turn-on losses for two transistors are calculated to compare the losses of two techniques. While the conventional soft switching technique shows the loss difference between two transistors, proposed soft switching technique shows equal as well as lower loss in two transistors.

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Cascaded H-bridge PWM 멀티레벨인버터의 스위칭 손실 저감을 위한 효율적인 스위칭 패턴 (Efficient Switching Pattern to Decrease Switching Losses in Cascaded H-bridge PWM Multilevel Inverter)

  • 정보창;김선필;김광수;박성준;강필순
    • 전기학회논문지
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    • 제62권4호
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    • pp.502-509
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    • 2013
  • It presents an efficient switching pattern, which expects a reduction of switching losses in a cascaded H-bridge PWM multilevel inverter. By the proposed switching scheme, the lower H-bridge module operates at low frequency of 60[Hz] because it assigns to transfer most load power. The upper H-bridge module operates at high frequency of PWM switching to improve THD of output voltage. The proposed switching pattern applies to cascaded H-bridge multilevel inverter with PD, APOD, bipolar, and unipolar switching methods. By computer-aided simulations, we verify the validity of the proposed switching scheme. Finally, we prove that the proposed PD and APOD switching patterns are better than those of the conventional one in efficiency.

무손실 스너버적용 고주파 소프트 스위칭 Forward 컨버터 (High Frequency Soft Switching Forward DC/DC Converter Using Non-dissipative Snubber)

  • 최해영;김은수;변영복;김철수;김윤호
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1999년도 전력전자학술대회 논문집
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    • pp.614-617
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    • 1999
  • To achieve high efficiency in high power and high frequency applications, reduction of switching losses and noise is very important. In this paper, an improved zero voltage switching forward dc/dc converter is proposed. The proposed converter is constructed by using energy recovery snubbers in parallel with the main switches and output diodes of the conventional forward dc/dc converter. Due to the use of the energy recovery snubbers in the primary and secondary side, the proposed converter achieves zero-voltage-switching turn-off without switching losses for switching devices and output rectification diodes. The complete operating principles and experimental results will be presented.

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Optimized PWM Switching Strategy for an Induction Motor Voltage Control

  • Lee, Hae-Hyung;Hwang, Seuk-Yung
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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    • pp.527-533
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    • 1998
  • An optimized PWM switching strategy for an induction motor voltage control is developed and demonstrated. Space vector modulation in voltage source inverter offers improved DC-bus utilization and reduced commutation losses, and has been therefor recognizedas the perfered PWM method, especially in the case of digital implementation. Three-phase invertor voltage control by space vector modulation consists of switching between the two active and one zero voltage vector by using the proposed optimal PWM algorithm. The prefered switching sequence is defined as a function of the modulation index and period of a carrier wave. The sequence is selected by suing the inverter switching losses and the current ripple as the criteria. For low and medium power application, the experimental results indicate that good dynamic response and reduced harmonic distortion can be achieved by increasing switching frequency.

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FB DC-DC Converter의 도전손실 저감과 무손실 스너버 회로에 관한 연구 (A Study on Reducing Conduction Losses and Lossless Snubber Circuit of Full-Bridge DC-DC Converter)

  • 라병훈;이현우;권순걸;김준홍;서기영;우정인
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 F
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    • pp.2665-2667
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    • 1999
  • This Paper proposes a new toplogy snubber circuit of Full-Bridge DC-DC Converter for reducing conduction losses and snubber circuit heating loss. Using Partial Resonent Soft Switching Method and Clamping, studying on a new snubber circuit for reducing losses that a snubber circuit heating loss in the secondly diode rectification side, a switching losses in the primary side of IGBT inverter and conduction losses in the high frequency insulation transformer. In this paper, we present FB DC-DC converter included a new lossless snubber circuit, and then be analyzed and simulated.

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전압원 인버터의 모델 예측 제어에서 스위칭 손실을 줄이기 위한 최적의 제로 벡터 선택 방법 (Optimal Zero Vector Selecting Method to Reduce Switching Loss on Model Predictive Control of VSI)

  • 박준철;박찬배;백제훈;곽상신
    • 전력전자학회논문지
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    • 제20권3호
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    • pp.273-279
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    • 2015
  • A zero vector selection method to reduce switching losses for model predictive control (MPC) of voltage source inverter is proposed. A conventional MPC of voltage source inverter has not been proposed, and a method to select the redundancy of the zero vector is required for this study. In this paper, the redundancy of the zero vectors is selected with generating a zero sequence voltage to reduce switching losses. The zero vector of 2-level inverter is determined by determining sign of the zero sequence voltage. In the proposed method, the quality of the current is retained and switching loss can be reduced compared with the conventional method. This result was verified by P-sim simulation and experiments.

전압제어 유도 전동기를 위한 최적 PWM 스위칭 방법 (An Optimized PWM Switching Strategy for an Induction Motor Voltage Control)

  • 한상수;추순남
    • 한국정보통신학회논문지
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    • 제13권5호
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    • pp.922-930
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    • 2009
  • 유도 전동기를 전압 제어하기 위한 최적 PWM 스위칭 방법을 제시하려한다. 전압 인버터의 공간 벡터 변조 방식은 DC-버스 이용을 향상시키고 정류 손실을 감소시키기 때문에 디지털 구현의 경우 특히 선호하는 PWM 방법이다. 유도 전동기 전압 제어를 위한 최적 PWM 스위칭 방법은 제시한 최적 PWM 알고리즘을 사용하여 두 개의 활성 전압 벡터(active voltage vector)와 하나의 영 전압 벡터(zero voltage vector)로 구성하였다. 선택된 스위칭 순차 열은 변조 지수(modulation index)와 운송파(carrier wave) 주기의 함수로 정의 된다. 순차 열은 인버터 스위칭 손실과 전류 리플 값을 기준으로 사용하여 선택된다. 실험 결과 중 저 전력용으로 사용할 경우 스위칭 주파수를 증가시킴에 따라 고조파 왜곡이 감소하고 동특성이 좋아짐을 확인할 수 있었다.

배터리팩 시험기를 위한 2단 구성 AC-DC 컨버터의 Si와 SiC의 손실 및 온도 비교 분석 (Analysis and Comparison of Switching Losses and Temperature using Si and SiC devices applied in Two Stage AC-DC Converter for Battery Pack Testing System)

  • 성호재;최형준;홍석진;현승욱;원충연
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2016년도 전력전자학술대회 논문집
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    • pp.397-398
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    • 2016
  • This paper analyzes switching losses, efficiency and temperature depending on Si and SiC devices applied in two stage AC-DC converter. To evaluate the charge and discharge performance and stability of the battery pack, there is a need for a battery pack testing system. To do battery charge and discharge experiment used in battery pack test, A topology, two stage AC-DC converter, has been built. SiC devices more decrease switching losses than that of Si. Also, cooling system was applied in Si and SiC devices. When using SiC devices, it can be confirmed that the size of heat sink is reduced for small loss.

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