• Title/Summary/Keyword: Switching loss model

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Power Loss Modeling of Individual IGBT and Advanced Voltage Balancing Scheme for MMC in VSC-HVDC System

  • Son, Gum Tae;Lee, Soo Hyoung;Park, Jung-Wook
    • Journal of Electrical Engineering and Technology
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    • v.9 no.5
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    • pp.1471-1481
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    • 2014
  • This paper presents the new power dissipation model of individual switching device in a high-level modular multilevel converter (MMC), which can be mostly used in voltage sourced converter (VSC) based high-voltage direct current (HVDC) system and flexible AC transmission system (FACTS). Also, the voltage balancing method based on sorting algorithm is newly proposed to advance the MMC functionalities by effectively adjusting switching variations of the sub-module (SM). The proposed power dissipation model does not fully calculate the average power dissipation for numerous switching devices in an arm module. Instead, it estimates the power dissipation of every switching element based on the inherent operational principle of SM in MMC. In other words, the power dissipation is computed in every single switching event by using the polynomial curve fitting model with minimum computational efforts and high accuracy, which are required to manage the large number of SMs. After estimating the value of power dissipation, the thermal condition of every switching element is considered in the case of external disturbance. Then, the arm modeling for high-level MMC and its control scheme is implemented with the electromagnetic transient simulation program. Finally, the case study for applying to the MMC based HVDC system is carried out to select the appropriate insulated-gate bipolar transistor (IGBT) module in a steady-state, as well as to estimate the proper thermal condition of every switching element in a transient state.

An Algorithm for Even Distribution of Loss, Switching Frequency, Power of Model Predictive Control Based Cascaded H-bridge Multilevel Converter (모델 예측 제어 기반 Cascaded H-bridge 컨버터의 균일한 손실, 스위칭 주파수, 전력 분배를 위한 알고리즘)

  • Kim, I-Gim;Kwak, Sang-Shin
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.5
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    • pp.448-455
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    • 2015
  • A model predictive control (MPC) method without individual PWM has been recently researched to simplify and improve the control flexibility of a multilevel inverter. However, the input power of each H-bridge cell and the switching frequency of switching devices are unbalanced because of the use of a restricted switching state in the MPC method. This paper proposes a control method for balancing the switching patterns and cell power supplied from each isolated dc source of a cascaded H-bridge inverter. The supplied dc power from isolated dc sources of each H-bridge cells is balanced with the proposed cell balancing method. In addition, the switching frequency of each switching device of the CHB inverter becomes equal. A simulation and experimental results are presented with nine-level and five-level three-phase CHB inverter to validate the proposed balancing method.

Switching Voltage Modeling and PWM Control in Multilevel Neutral-Point-Clamped Inverter under DC Voltage Imbalance

  • Nguyen, Nho-Van;Nguyen, Tam-Khanh Tu;Lee, Hong-Hee
    • Journal of Power Electronics
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    • v.15 no.2
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    • pp.504-517
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    • 2015
  • This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.

Study on the Parameter Optimization of Soft-switching DC/DC Converters with the Response Surface Methodology, a SPICE Model, and a Genetic Algorithm

  • Liu, Shuai;Wei, Li;Zhang, Yicheng;Yao, Yongtao
    • Journal of Power Electronics
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    • v.15 no.2
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    • pp.479-486
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    • 2015
  • The application of soft-switching techniques is increasing in the DC/DC converter area. It is important to design soft-switching parameters to ensure the converter operates properly and efficiently. An optimized design method is presented in this paper. The objective function is the total power loss of a converter, while the variables are soft-switching parameters and the constraints are the electrical requirements for soft-switching. Firstly, a response surface methodology (RSM) model with a high precision is built, and the rough optimized parameters can be obtained with the help of a genetic algorithm (GA) in the solution space determined by the constraints. Secondly, a re-optimization is conducted with a SPICE model and a GA, and accurate optimized parameters can be obtained. Simulation and experiment results show that the proposed method performs well in terms of a wide adaptability, efficiency, and global optimization.

Clamp mode forward multi-resonant conveter with synchronous rectifier (동기 정류기를 이용한 클램프 모드 포워드 다중 공진형 컨버터)

  • 안강순;김희준
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.34S no.2
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    • pp.112-120
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    • 1997
  • The clamp mode (CM) forward zero voltage switching multi resonant converter (ZVS-MPC) with self-driven synchronous rectifier is studied. The loss at the synchronous rectification stage of the converter is analyzed using MOSFET piecewise linear model and is compared with the loss at the conventional schottky diode rectification stage of th econverter. From the results of the analysis, it is known that the use fo MOSFETs as a synchronous rectifier reduces the loss at the rectification stage overthe whole load range comparing the use of schottky diodes as a conventional rectifier in the converter. In order to verify the validit of the analysis, we have built a 33W(3.3V/10A) CM forward ZVS-MRC with self-driven synchronous rectifier, in which switching frequency is 1MHz, and tested. FRom the experimental results, it is known that the synchronous rectification achieved about 1W improvement in the loss at the rectification stage and about 3% in the efficiency at the converter as compared with the conventional schottky diode rectification.

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Analytical Model of Conduction and Switching Losses of Matrix-Z-Source Converter

  • You, Keping;Rahman, M.F.
    • Journal of Power Electronics
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    • v.9 no.2
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    • pp.275-287
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    • 2009
  • This paper investigates analytical models of Conduction and Switching Losses (CASLs) of a matrix-Z-source converter (MZC). Two analytical models of the CASLs are obtained through the examination of operating principles for a Z-source inverter and ac-dc matrix converter respectively. Based on the two models, the analytical model of CASLs for a MZC is constructed and visualized over a range of exemplified operating- points, each of which is defined by the combination of power factor (pt) and modulation index (M). The model provides a measurable way to approximate the total losses of the MZC.

Burst Sending Rate Control Scheme to Improve the Performance of Optical Burst Switching Networks (광 버스트 교환 망의 성능향상을 위한 버스트 전송률 제어 방식)

  • Lee Su kyoung;Kim Lae young
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.3A
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    • pp.178-183
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    • 2005
  • In Optical Burst Switching(OBS) networks, burst loss due to contention significantly affects the performance of networks. Even if many contention resolution schemes have been proposed, most of them have focused mainly on passively resolving contentions instead of avoiding them. In this paper, we propose an active contention avoidance scheme which controls a burst sending rate according to traffic load and burst loss in a network. Simulation results show that the proposed scheme can more effectively reduce the burst loss rate compared to existing OBS model with and without burst sending rate control, and at the same time guarantees throughput.

A Study on the Optimal Design of LLC Resonant Half-bridge dc-dc Converter Using a Steady-state Model with Internal Loss Resistors (내부 손실 저항이 있는 정상상태 모델을 이용한 LLC 공진형 하프 브리지 dc-dc컨버터의 최적 설계에 관한 연구)

  • Yoo, Jeong Sang;Ahn, Tae Young
    • Journal of the Semiconductor & Display Technology
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    • v.21 no.3
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    • pp.80-86
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    • 2022
  • In this paper, the optimal design and circuit simulation verification results of an LLC resonant half-bridge dc-dc converter using a steady-state model with internal loss resistance are reported. Above all, the input/output voltage gain and frequency characteristic equations in the steady-state were derived by reflecting the internal loss resistance in the equivalent circuit. Based on the results, an LLC resonant half-bridge dc-dc converter with an input voltage of 360-420V, an output voltage of 54V, and a maximum power of 3kW was designed, and to verify the design, the PSIM circuit simulation was executed to compare and analyze the result. In particular, the operating range of the converter could be drawn from the frequency characteristic graph of the voltage gain, and when the converter was operated under light and maximum load conditions, it was confirmed that similar results were obtained by comparing simulation results and calculation results in the switching frequency characteristic graph. In addition, the change of the switching frequency with respect to the load current at each input voltage was compared with the calculated value and the simulation result. As a result, it was possible to confirm the usefulness of the analysis result reflecting the internal loss resistance proposed in this paper and the process of the optimal design.

Loss Modeling in order to Predict the Efficiency Performance of Induction Motor Drive System (유도전동기 드라이브 시스템의 효율성능을 예측하기 위한 손실 모델링)

  • 정동화;박기태;이정철
    • Journal of the Korean Society of Safety
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    • v.15 no.4
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    • pp.56-61
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    • 2000
  • The precise and reliable loss model for induction motor and converter system is very important in order to predict the efficiency performance of variable speed drives. This paper proposes an accurate loss model of induction motor and converter system. The motor losses, such as stator and rotor copper loss, core loss and stray loss, are considered for fundamental and harmonic frequencies. Also considered are the skin effect on rotor resistance, temperature effect on bath stator and rotor resistance, magnetizing inductance saturation, and friction and windage loss. All the above features are incorporated in a synchronous frame dynamic d-q equivalent circuit. The converter system, consisting of a diode rectifier and PWM transistor inverter, is modeled accurately for conduction and switching losses. Validity of the models, in both steady state and transient conditions, is verified by simulations.

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Evaluation of Packet Loss Rate in Optical Burst Switching equipped with Optic Delay Lines Buffer

  • To, Hoang-Linh;Bui, Dang-Quang;Hwang, Won-Joo
    • Proceedings of the Korea Multimedia Society Conference
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    • 2012.05a
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    • pp.166-167
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    • 2012
  • High packet loss rate and impatience of messages passing through optical switches are essential characteristics in Optical Burst Switching system equipped with Optic Delay Lines buffer, which have not been solved efficiently yet by current existing models. In order to capture both effects, this paper introduces an analytical model from the viewpoint of classical queuing theory with impatient customers. We then apply it to evaluate and compare two wavelength-sharing cases, (1) all delay lines share a common wavelength resource and (2) each wavelength is associated with a number of delay lines. Our numerical results suggest to implement the first case because of lower packet loss rate for a fairly broad range of traffic load.

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