• JSTS:Journal of Semiconductor Technology and Science
• /
• 제15권4호
• /
• pp.471-476
• /
• 2015

This paper describes a CMOS hysteretic DC-DC buck converter with a constant switching frequency for mobile applications. The inherent problems of a large output ripple voltage that the conventional hysteretic DC-DC buck converters has faced have been resolved by using the proposed DC-DC buck converter which employed a ramp generator circuit to be able to increase a switching frequency. The proposed architecture enables the settling response time of charge pump circuit within the converter to become less than 6us suitable for mobile applications. The proposed DC-DC buck converter was implemented by using 0.35 um BCDMOS process and die size was $1.37mm{\times}1.37mm$. The measurement results showed that the proposed circuit received the input of 3.7 V and generated output of 1.2 V with the output ripple voltages less than 20 mV under load currents of 100~400 mA at the fixed switching frequency of 2 MHz. The maximum efficiency of the proposed hysteretic buck converter was measured to be around 93%.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• 제13권7호
• /
• pp.3511-3532
• /
• 2019

Coverage-guided fuzzing is an efficient solution that has been widely used in software testing. By guiding fuzzers through the coverage information, seeds that generate new paths will be retained to continually increase the coverage. However, we observed that most samples follow the same few high-frequency paths. The seeds that exercise a high-frequency path are saved for the subsequent mutation process until the user terminates the test process, which directly affects the efficiency with which the low-frequency paths are tested. In this paper, we propose a fuzzing solution, ER-Fuzz, that truncates the recording of a high-frequency path to influence coverage. It utilizes a deep learning-based classifier to locate the high and low-frequency path transfer points; then, it instruments at the transfer position to promote the probability low-frequency transfer paths while eliminating subsequent variations of the high-frequency path seeds. We implemented a prototype of ER-Fuzz based on the popular fuzzer AFL and evaluated it on several applications. The experimental results show that ER-Fuzz improves the coverage of the original AFL method to different degrees. In terms of the number of crash discoveries, in the best case, ER-Fuzz found 115% more unique crashes than did AFL. In total, seven new bugs were found and new CVEs were assigned.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1996년도 하계학술대회 논문집 A
• /
• pp.537-539
• /
• 1996

In this paper, a design method of the phase shift ZVS-PWM converter is proposed to minimize the volume and increase the efficiency. The trade-offs of switching frequency, efficiency vs volume and ZVS range vs efficiency is also presented. The simulation of the designed converter is performed using the P-SPICE in which a phase-shift controller is proposed. For minimization of the converter volume, switching frequency is selected 100kHz, a simple drive circuit and single auxiliary supply are applied. In consideration of efficiency and load condition, ZVS range is decided from 50% to full load. A 28V, 1Kwatt prototype converter, of which the switch is MOSFET is made, verified the performance.

• 한국정보통신학회:학술대회논문집
• /
• 한국해양정보통신학회 2009년도 추계학술대회
• /
• pp.333-336
• /
• 2009

장비의 리액터브 성분의 물리적 크기를 저감하고 동특성을 개선하기 위하여 동작스위칭 주파수를 증가 시키는 것이 우수하나 이러한 방식은 발열과 스트레스로 인한 전력소자의 파괴, 스위칭손실 증가로 인한 효율 감소등 다양한 문제가 발생하게 된다. 따라서, 본 논문에서는 이러한 문제점을 해결하기 위해 보조장치를 응용한 기동전류 회로를 적용한 하프브리지 방식의 Intense Pulse Light를 제안 하였다. 시뮬레이션 및 실험결과를 통해 20% 향상을 가져와 환자에게 보다 더 질적인 측정을 할 수가 있다고 확인하였다.

• Journal of Power Electronics
• /
• 제12권4호
• /
• pp.615-622
• /
• 2012

The switching frequency of the power electronic devices used in large synchronous motor drives is usually kept low (less than 1 kHz) to reduce the switching losses and to improve the converter power capability. However, this results in a couple of problems, e.g. an increase in the harmonic components of the stator current, and an undesired cross-coupling between the magnetization current component ($i_m$) and the torque component ($i_t$). In this paper, a novel complex matrix model of electrically excited synchronous motors (EESM) was established with a new control scheme for coping with the low switching frequency issues. First, a hybrid observer was proposed to identify the instantaneous fundamental component of the stator current, which results in an obvious reduction of both the total harmonic distortion (THD) and the low order harmonics. Then, a novel complex current controller was designed to realize the decoupling between $i_m$ and $i_t$. Simulation and experimental results verify the effectiveness of this novel control system for EESM drives.

• Journal of Power Electronics
• /
• 제17권1호
• /
• pp.106-114
• /
• 2017

In this paper, the Selective Harmonic Mitigation-PWM (SHM-PWM) method is used in single-phase and three-phase Cascaded H-Bridge (CHB) inverters in order to fulfill different power quality standards such as EN 50160, CIGRE WG 36-05, IEC 61000-3-6 and IEC 61000-2-12. Non-equal DC link voltages are used to increase the degrees of freedom for the proposed SHM-PWM technique. In addition, it will be shown that the obtained solutions become continuous and without sudden changes. As a result, the look-up tables can be significantly reduced. The proposed three-phase modulation method can mitigate up to the 50th harmonic from the output voltage, while each switch has just one switching in a fundamental period. In other words, the switching frequency of the power switches are limited to 50 Hz, which is the lowest switching frequency that can be achieved in the multilevel converters, when the optimal selective harmonic mitigation method is employed. In single-phase mode, the proposed method can successfully mitigate harmonics up to the 50th, where the switching frequency is 150 Hz. Finally, the validity of the proposed method is verified by simulations and experiments on a 9-level CHB inverter.

• Journal of Power Electronics
• /
• 제18권4호
• /
• pp.1255-1267
• /
• 2018

Parasitic parameters have a larger influence on Silicon Carbide (SiC) devices with an increase of the switching frequency. This limits full utilization of the performance advantages of the low switching losses in high frequency applications. By combining a theoretical analysis with a experimental parametric study, a mathematic model considering the parasitic inductance and parasitic capacitance is developed for the basic switching circuit of a SiC MOSFET. The main factors affecting the switching characteristics are explored. Moreover, a fast-switching double pulse test platform is built to measure the individual influences of each parasitic parameters on the switching characteristics. In addition, guidelines are revealed through experimental results. Due to the limits of the practical layout in the high-speed switching circuits of SiC devices, the matching relations are developed and an optimized layout design method for the parasitic inductance is proposed under a constant length of the switching loop. The design criteria are concluded based on the impact of the parasitic parameters. This provides guidelines for layout design considerations of SiC-based high-speed switching circuits.

• Journal of Power Electronics
• /
• 제9권3호
• /
• pp.396-402
• /
• 2009

A DC/DC converter generally needs to work under high switching frequency when used as an adjustable power supply to reduce the size of magnetic elements such as inductors, transformers and capacitors, but with the rising of the switch frequency, the switch losses will increase and the efficiency will reduce. Recently, to solve these problems, research is actively being done on a soft switching method that can be applied under high frequency and on a PWM converter that can be applied under low frequency such as a multi-level topology. In this paper a novel DC-DC conversion method for reducing the ripple of output voltage is proposed. In the proposed converter, buck converters are connected in series to generate the output voltage. By using this method, the ripple of output voltage can be reduced compared to a conventional buck converter. Particularly when output voltage is low, the number of acting switching elements is less and the result of ripple reduction is more obvious. It is expected that the converter proposed in this paper could be very useful in the case of wide-range output voltage.

• 전자공학회논문지B
• /
• 제33B권10호
• /
• pp.148-156
• /
• 1996

Increasing the switching frquency is essential to achieve the high density of switched mode power supplies, but this leads to the increase of switching losses. A number of new soft switching converters have been presented ot reduce switching losses, but most of them may have some demerits, such as the increase of voltage/current stresses and high conduction losses. To overcome these problems, the ZVT-PWM converter has recently been presented. in this paper, the operation characteristics of the ZVT-PWM boost converter is analyzed, and the steady-states (DC) and small-signal model of this converter are derived and analyzed, and then the transfer functions of this converter are derived. The transfer functions of ZVT-PWM boost converter are similar to those of the conventional PWM boost converter, but the transfer characteristics are affecsted by te duty ratio and the switching frequency.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1996년도 하계학술대회 논문집 A
• /
• pp.619-621
• /
• 1996

This paper presents the study on the development of the power factor correction convener with ZVT Boost converter, which is better than the conventional PWM Boost converter to increase the switching frequency for high density and lower stress of switch. A simple DC and small signal model for the power factor correction converter with constant switching frequency is derived. The guide line for design of controller is summarized.