• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.2
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• pp.181-184
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• 2017

This study analyzes the turn-on and turn-off transients of a metal-oxide-semiconductor field-effect transistor (MOSFET) with high-switching frequency systems. In these systems, the voltage distortion becomes serious at the output terminal of a Vienna rectifier by the turn-off delay of the MOSFET. The current has low-order harmonics through this voltage distortion. This paper describes the transient of the turn-off that causes the voltage distortion. The algorithm for reducing the sixth harmonic using a proportional-resonance controller is proposed to improve the current distortion without complex calculation for compensation. The reduction of the current distortion by high-switching frequency is verified by experiment with the 2.5-kW prototype Vienna rectifier.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1879-1888
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• 2018

With power level of grid-connected converters rising, the switching frequency of the switching devices is commonly greatly reduced to improve its power capacity. However, this results in serious couplings of the dq current components, which leads to degradation of the static and dynamic performances of grid-connected converters and fluctuations of the reactive power in dynamic processes. In this paper, complex vector models under low switching frequency are established for an L/LCL grid-connected converter, and the relationship between the switching frequency and the coupling degree is analyzed. In addition, a series decoupling current control strategy is put forward. It is shown that the proposed control strategy can eliminate the couplings, improve the performances and have good robustness to parameter variations through static and dynamic characteristics analyses and a sensitivity analysis. Experimental and simulation results also verify the correctness of the theoretical analyses and the superiority of the proposed control strategy.

• Journal of Electrical Engineering and Technology
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• v.2 no.1
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• pp.89-97
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• 2007

This paper presents a new circuit topology of active edge resonant snubbers assisted half-bridge soft switching PWM inverter type DC-DC high power converter for DC bus feeding power plants. The proposed DC-DC power converter is composed of a typical voltage source-fed half-bridge high frequency PWM inverter with a high frequency planar transformer link in addition to input DC busline side power semiconductor switching devices for PWM control scheme and parallel capacitive lossless snubbers. The operating principle of the new DC-DC converter treated here is described by using switching mode equivalent circuits, together with its unique features. All the active power switches in the half-bridge arms and input DC buslines can achieve ZCS turn-on and ZVS turn-off commutation transitions. The total turn-off switching losses of the power switches can be significantly reduced. As a result, a high switching frequency IGBTs can be actually selected in the frequency range of 60 kHz under the principle of soft switching. The performance evaluations of the experimental setup are illustrated practically. The effectiveness of this new converter topology is proved for such low voltage and large current DC-DC power supplies as DC bus feeding from a practical point of view.

• Journal of Electrical Engineering and Technology
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• v.12 no.5
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• pp.1872-1882
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• 2017

Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

• Journal of Power Electronics
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• v.17 no.1
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• pp.115-126
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• 2017

This paper presents a new cascaded asymmetrical single phase multilevel converter with a reduced number of isolated DC sources and power semiconductor switches. The proposed inverter has only two H-bridges connected in cascade, one switching at a high frequency and the other switching at a low frequency. The Low Switching Frequency Inverter (LSFI) generates seven levels whereas the High Switching Frequency Inverter (HSFI) generates only two levels. This paper also presents a solution to the capacitor balancing issues of the LSFI. The proposed inverter has lot of advantages such as reductions in the number of DC sources, switching losses, power electronic devices, size and cost. The proposed inverter with a capacitor voltage balancing algorithm is simulated using MATLAB/SIMULINK. The switching logic of the proposed inverter with a capacitor voltage balancing algorithm is developed using a FPGA SPATRAN 3A DSP board. A laboratory prototype is built to validate the simulation results.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.6
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• pp.530-537
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• 2016

This work deals with a switching method for minimizing overcurrent in a three-phase interleaved bidirectional DC-DC converter with frequency modulation. Generally, a three-phase interleaved DC-DC converter is used to reduce a current ripple component. The combined operation of three-phase and two-phase converters can significantly reduce the ripple component. However, the conventional PWM method cannot solve severe overcurrent during phase transfer or frequency variation for power control. To overcome this problem, this work proposes a new PWM switching method. A 3 kW DC-DC power converter is designed and implemented, and the converter is operated in discontinuous current mode with varying switching frequencies for power control. Simulation and experimental results show the validity of the proposed switching method. The proposed switching method can be widely used in the field of current ripple reduction for three-phase interleaved bidirectional DC-DC converters.

• Journal of Power Electronics
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• v.10 no.4
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• pp.342-350
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• 2010

Randomizing the switching frequency (RSF) to reduce the electromagnetic interference (EMI) of switching power converters is a well-known technique that has been previously discussed. The randomized pulse position (RPP) technique, in which the switching frequency is kept fixed while the pulse position (the delay from the starting of the switching cycle to the turn-on instant within the cycle) is randomized, has been previously addressed in the literature for the same purpose. This paper presents a double-hybrid technique (DHB) for EMI reduction in dc-dc switching regulators. The proposed technique employed both the RSF and the RPP techniques. To effectively spread the conducted-noise frequency spectrum and at the same time attain a satisfactory output voltage quality, two parameters (switching frequency and pulse position) were randomized, and a third parameter (the duty ratio) was controlled by a digital compensator. Implementation was achieved using field programmable gate array (FPGA) technology, which is increasingly being adopted in industrial electronic applications. To evaluate the contribution of the proposed DHB technique, investigations were carried out for each basic PWM, RPP, RSF, and DHB technique. Then a comparison was made of the performances achieved. The experimentally investigated features include the effect of each technique on the common-mode, differential-mode, and total conducted-noise characteristics, and their influence on the converter’s output ripple voltage.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.37 no.8
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• pp.528-533
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• 1988

The miniturization of a DC-to-DC converter in connection with the stability is investigated in this paper. As both the capacitance of the smoothing capacitor and the inductance of the reactor are reduced by rasing the switching frequency, it is known that the stability of the buck converter declines with the switching frequency but the buck-boost converter has a nearly uniform stability. Furthermore, that the buck-boost converter is suitable for the miniturization of circuit is cleared in the high frequency region above a certain switching frequency.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.2145-2147
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• 1998

This paper presents a Class-D type switched mode audio power amplifier employing ZVT(Zero-Voltage-Transition) soft switching technique. In order to obtain a wide bandwidth and lower distortion for an audio amplifier a high switching frequency is essential. The ZVT switching scheme enables a high frequency switching without sacrificing the efficiency much as in a hard switching. A prototype amplifier is built to demonstrate the feasibility of this technique for the audio power amplifier.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.1
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• pp.96-103
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• 2006

This paper proposes a new technique for improving the efficiency of single phase high frequency switch mode boost converter. This converter includes an additional boost converter that follows the main hish frequency switching device. The additional converter, which is controlled at lower frequencies, bypasses almost all the current in the main switch and the high frequency switching loss is greatly reduced. Both switching devices are controlled by a simple method; each controller consists of a one-shot multivibrator, a comparator and an AND gate, and the maximum switching frequency can be limited without any clock generator. The converter works cooperatively in high efficiency and acts as though it were a conventional high frequency switch mode converter with one switching device. This paper describes the proposed converter configuration, design, and discusses the steady state performance concerning the switching loss reduction and efficiency improvement. and the proposed method is verified by computer simulation.