• Title/Summary/Keyword: Switching devices

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A Study on The Development and Function Test of Digital Transformer Protection Relay Using The Induced Voltage (유기전압비를 이용한 디지털형 변압기 보호계전기 개발 및 성능시험에 관한 연구)

  • Jung, Sung-Kyo;Lee, Jae-Kyung;Kim, Han-Do;Choi, Dae-Gil;Kang, Yong-Chul;Kang, Sang-Hee
    • Proceedings of the KIEE Conference
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    • 2001.11b
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    • pp.216-218
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    • 2001
  • The transformer role is very important in power system operation and control; also its price is very expensive. Therefore many kinds of the efforts for transformer protection have been executed. So for as, current differential relay(87) has been mainly used for transformer protection. But current differential relaying method has several troubles as followings. Differential current can be occurred by transformers inrush current between winding1 and winding2 of transformer when transformer is initially energized. Also harmonic restrained element used in current differential relaying method is one of the causes of relays mal-operation because recently harmonics in power system gradually increase by power switching devices(SVC, FACTS, DSC, etc). Therefore many kinds of effort have been executed to solve the trouble of current differential relay and one of them is method using ratio of increment of flux linkages(RIFL) of the primary and secondary windings. This paper introduces a novel protective relay for power transformers using RIFL of the primary and secondary windings. Novel protective relay successfully discriminates between transformer internal faults and normal operation conditions including inrush and this paper includes real time test results using RTDS(Real Time Digital Simulator) for novel protective relay. A novel protective relay was designed using the TMS320C32 digital signal processor and consisted of DSP module. A/D converter module, DI/DO module, MMI interface module and LCD display module and developed by Xelpower co., Ltd.

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An multiple energy harvester with an improved Energy Harvesting platform for Self-powered Wearable Device (웨어러블 서비스를 위한 다중 발전소자 기반 에너지 하베스터 플랫폼 구현)

  • Park, Hyun-Moon;Kim, Byung-Soo;Kim, Dong-Sun
    • The Journal of the Korea institute of electronic communication sciences
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    • v.13 no.1
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    • pp.153-162
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    • 2018
  • The importance of energy harvesting technique is increasing due to the elevated level of demand for sustainable power sources for wearable device applications. In this study, we developed an Energy Harvesting wearable Platform(EH-P) architecture which is used in the design of a multi-energy source based on TENG. The proposed switching circuit produces power with higher current at lower voltage from energy harvesting sources with lower current at higher voltage. This can powers microcontrollers for a short period of time by using PV and TENG complementarily placed under hard conditions for the sources such as indoors. As a result, the whole interface circuit is completely self-powered with this makes it possible to run of sensing on a Wearable device platform. It was possible to increase the wearable device life time by supplying more than 29% of the power consumption to wearable devices. The results presented in this paper show the potential of multi-energy harvesting platform for use in wearable harvesting applications, provide a means of choosing the energy harvesting source.

Development of Adsorption Desalination System Utilizing Silica-gel (실리카겔을 이용한 흡착식 담수화 시스템의 기초연구)

  • Hyun, Jun-Ho;Kim, Yeong-Min;Jung, Jin-Ho;Lee, Yoon-Joon;Chun, Won-Gee
    • 한국태양에너지학회:학술대회논문집
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    • 2011.04a
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    • pp.204-209
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    • 2011
  • According to the environment report of UN, korea was classified as potable water shortage countries. Approximately 71% of the Earth's surface is covered by ocean. However, it is difficult to use for industry of residential purpose without a certain processing. The development of solar and waste-heat used absorption desalination technology have been examined as a viable option for supplying clean energy. In this study, the modelling of the main devices for solar and waste-heat used and adsorption desalination system was introduced. The design is divided into three parts. First, the evaporator for the vaporization of the top water is designed, and then the reactor for the adsorption and release of the steam is designed, followed by the condenser for the condensation of the fresh water is designed. In addition, new features based on the energy balance are also included to design absorption desalination system. In this basicresearch, One-bed(reactor) adsorption desalination plant that employ a low-temperature solar and waste energy was proposed and experimentally studied. The specific water yield is measured experimentally with respect to the time controlling parameters such as heat source temperatures, coolant temperatures, system switching and half-cycle operational times.

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A Multi-Load Shoring Characteristic Using Novel Buck-Boost Chopper Circuit (새로운 승·강압 초퍼 회로를 이용한 부하 다분할 특성)

  • Suh, Ki-Young;Mun, Sang-Pil;Kwon, Soon-Kurl;Lee, Hyun-Woo;Jung, Sang-Hwa
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.2
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    • pp.42-48
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    • 2005
  • A DC-DC converter is being widely used for various household appliances and for industry applications. The DC-CC converter is powered from single battery, and the voltage is varied according to the purpose. In the vehicle, various accessories whose electric power is different are being un4 Thus, plural number of DC-DC converter should be provided, so these situations bring complicated circuits, and accordingly, higher cost. Under such backgrounds, in this paper, we propose a novel buck-boost chopper circuit with simply configuration which can supply to two or more different output loads. The propose chewer circuit can control output voltages by controlling duty ratio by using typically two switching devices, which is composed by single boost-switch and single buck-switch. The output voltage can be controlled widely. A few modified circuits developed from the fundamental circuit are represented including the general multi-load circuit. And all this merits and appropriateness was proved by computer simulation and experience.

Tunnel Magnetoresistance with Plasma Oxidation Time in Double Oxidized Barrier Process (2단계 AlOx 절연층 공정에서 하부절연층의 산화시간에 따른 터널자기저항 특성연구)

  • Lee, Young-Min;Song, Oh-Sung
    • Korean Journal of Materials Research
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    • v.12 no.3
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    • pp.200-204
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    • 2002
  • We fabricated TMR devices which have double oxidized tunnel barrier using plasma oxidation method to form homogeneously oxidized AlO tunnel barrier. We sputtered 10 $\AA$-bottom Al layer and oxidized it by varying oxidation time for 5, 10, 20 sec. Subsequent sputtering of 13 $\AA$ - Al was performed and the matallic layer was oxidized for 120 sec. The electrical resistance changed from 700$\Omega$ to 2700$\Omega$ with increase of oxidation time, while variation of MR ratio was little spreading 27~31% which is larger than that of TMR device of ordinary single tunnel barrier. We calculated effective barrier height and width by measuring I-V curves, from which we found the barrier height was 1.3~1.5 eV, sufficient for tunnel barrier, and the barrier width(<16.2 $\AA$) was smaller than that of directly measured value by the tunneling electron microscopy. Our results may be caused by insufficient oxidation of Al precursor into $Al_2O_3$. However, double oxidized tunnel barriers were superior to conventional single tunnel barrier in uniformity and density. We found that the external magnetic field to switch spin direction of ferromagnetic layer of pinned layer breaking ferro-antiferro exchange coupling was increased as bottom layer oxidation time increased. Our results imply that we were able to improve MR ratio and tune switching field by employing double oxidized tunnel barrier process.

Multi-Secondary Transformer: A Modeling Technique for Simulation - II

  • Patel, A.;Singh, N.P.;Gupta, L.N.;Raval, B.;Oza, K.;Thakar, A.;Parmar, D.;Dhola, H.;Dave, R.;Gupta, V.;Gajjar, S.;Patel, P.J.;Baruah, U.K.
    • Journal of international Conference on Electrical Machines and Systems
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    • v.3 no.1
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    • pp.78-82
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    • 2014
  • Power Transformers with more than one secondary winding are not uncommon in industrial applications. But new classes of applications where very large number of independent secondaries are used are becoming popular in controlled converters for medium and high voltage applications. Cascade H-bridge medium voltage drives and Pulse Step Modulation (PSM) based high voltage power supplies are such applications. Regulated high voltage power supplies (Fig. 1) with 35-100 kV, 5-10 MW output range with very fast dynamics (${\mu}S$ order) uses such transformers. Such power supplies are widely used in fusion research. Here series connection of isolated voltage sources with conventional switching semiconductor devices is achieved by large number of separate transformers or by single unit of multi-secondary transformer. Naturally, a transformer having numbers of secondary windings (~40) on single core is the preferred solution due to space and cost considerations. For design and simulation analysis of such a power supply, the model of a multi-secondary transformer poses special problem to any circuit analysis software as many simulation softwares provide transformer models with limited number (3-6) of secondary windings. Multi-Secondary transformer models with 3 different schemes are available. A comparison of test results from a practical Multi-secondary transformer with a simulation model using magnetic component is found to describe the behavior closer to observed test results. Earlier models assumed magnetising inductance in a linear loss less core model although in actual it is saturable core made-up of CRGO steel laminations. This article discusses a more detailed representation of flux coupled magnetic model with saturable core properties to simulate actual transformers very close to its observed parameters in test and actual usage.

Fabrication and Characterization of MFIS-FET using Au/SBT/LZO/Si structure

  • Im, Jong-Hyun;Lee, Gwang-Geun;Kang, Hang-Sik;Jeon, Ho-Seung;Park, Byung-Eun;Kim, Chul-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.174-174
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    • 2008
  • Non-volatile memories using ferroelectric-gate field-effect transistors (Fe-FETs) with a metal/ferroelectric/semiconductor gate stack (MFS-FETs) make non-destructive read operation possible. In addition, they also have features such as high switching speed, non-volatility, radiation tolerance, and high density. However, the interface reaction between ferroelectric materials and Si substrates, i.e. generation of mobile ions and short retention, make it difficult to obtain a good ferroelectric/Si interface in an MFS-FET's gate. To overcome these difficulties, Fe-FETs with a metal/ferroelectric/insulator/semiconductor gate stack (MFIS-FETs) have been proposed, where insulator as a buffer layer is inserted between ferroelectric materials and Si substrates. We prepared $SrBi_2Ta_2O_9$ (SBT) film as a ferroelectric layer and $LaZrO_x$ (LZO) film as a buffer layer on p-type (100) silicon wafer for making the MFIS-FET devices. For definition of source and drain region, phosphosilicate glass (PSG) thin film was used as a doping source of phosphorus (P). Ultimately, the n-channel ferroelectric-gate FET using the SBT/LZO/Si Structure is fabricated. To examine the ferroelectric effect of the fabricated Fe-FETs, drain current ($I_d$) versus gate voltage ($V_g$) characteristics in logarithmic scale was measured. Also, drain current ($I_d$) versus drain voltage ($V_d$) characteristics of the fabricated SBT/LZO/Si MFIS-FETs was measured according to the gate voltage variation.

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Design and Implementation of a Control System for the Interleaved Boost PFC Converter in On-Board Battery Chargers (차량 탑재형 배터리 충전기의 인터리브드 부스트 PFC 컨버터 제어시스템 설계 및 구현)

  • Lee, Jun Hyok;Jung, Kwang-Soon;Lee, Kyung-Jung;Jung, Jae Yeop;Kim, Ho Kyung;Hong, Sung-Soo;Ahn, Hyun-Sik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.5
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    • pp.843-850
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    • 2016
  • In this paper, we propose a digital controller design process for the interleaved type of a boost PFC (Power Factor Correction) converter which can disperse the heat of the switching devices due to the interleaved topology. We establish a mathematical model of a boost PFC converter and propose a controller design method based on the root locus. The performance of the designed controller is verified by simulations. The measurement of the input voltage, inductor currents, and the converter output link voltage are needed for the control of the converter system which consists of a power unit and a control unit where a high-performance 32-bit microcontroller is used. The adjustment of A/D conversion timing is also needed to avoid high frequency noise generated when the switches on/off. It is illustrated by the real experiments that the designed control system with the properly adjusted ADC timing satisfies the given performance specifications of the interleaved boost PFC converter in the on-board slow battery charger.

Minimization of Welding Time for an AC Resistance Spot Welding System With 60Hz Transformer (60Hz용 변압기를 이용한 인버터 AC 스폿용접시스템의 용접시간 최소화)

  • Seok, Jin-Kyu;Kang, Sung-Kwan;Song, Woong-Hyub;Nho, Eui-Cheol;Kim, In-Dong;Kim, Heung-Geun;Chun, Tae-Won
    • The Transactions of the Korean Institute of Power Electronics
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    • v.15 no.3
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    • pp.218-225
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    • 2010
  • This paper deals with a method to minimize the welding time for an AC spot welding system. The spot welding system using a conventional SCR type circuit has a disadvantage of slow control speed and no precise current control. Therefore, recently, the using of inverter type welding system is increasing. Conventional welding machine adopts several tens of switching devices connected in parallel to obtain a huge current of several thousands ampere with a short welding time. This paper analyzed a welding system consisting with 4 IGBT switches for a full-bridge inverter and conventional 60 [Hz] transformer. The simulation and experimental results show the validity of the proposed method.

A Design of Three Switch Buck-Boost Converter (3개의 스위치를 이용한 벅-부스트 컨버터 설계)

  • Koo, Yong-Seo;Jung, Jun-Mo
    • Journal of IKEEE
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    • v.14 no.2
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    • pp.82-89
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    • 2010
  • In this paper, a buck-boost converter using three DTMOS(Dynamic Threshold Voltage MOSFET) switching devices is presented. The efficiency of the proposed converter is higher than that of conventional buck-boost converter. DTMOS with low on-resistance is designed to decrease conduction loss. The threshold voltage of DTMOS drops as the gate voltage increases, resulting in a much higher current handling capability than standard MOSFET. In order to improve the power efficiency at the high current level, the proposed converter is controlled with PWM(pulse width modulation) method. The converter has maximum output current 300mA, input voltage 3.3V, output voltage from 700mV to 12V, 1.2MHz oscillation frequency, and maximum efficiency 90%. Moreover, the LDO(low drop-out) is designed to increase the converting efficiency at the standby mode below 1mA.