• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제3B권1호
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• pp.10-15
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• 2003

This paper presents the digital computer performance evaluations of the three-phase self-excited induction generator (SEIG) driven by the variable speed prime mover such as the wind turbine using the nodal admittance approach steady-state frequency domain analysis with the experimental results. The three-phase SEIG setup is implemented for small-scale rural renewable energy utilizations. The experimental performance results give a good agreement with those ones obtained from the digital computer simulation. Furthermore, a feedback closed-loop voltage regulation of the three-phase SEIG as a power conditioner which is driven by a variable speed prime mover employing the static VAR compensator (SVC) circuit composed of the thyristor phase controlled reactor (TCR) and the thyristor switched capacitor(TSC) is designed and considered herein for the wind-turbine driven the power conditioner. To validate the effectiveness of the SVC-based voltage regulator of the terminal voltage of the three-phase SEIG, an inductive load parameter disturbances in stand-alone are applied and characterized in this paper. In the stand-alone power utilization system, the terminal voltage response and thyristor triggering angle response of the TCR are plotted graphically. The simulation and the experimental results prove the effectiveness and validity of the proposed SVC which is controlled by the Pl controller in terms of fast response and high performances of the three-phase SEIG driven directly by the rural renewable energy utilization like a variable-speed prime mover.

• 대한전자공학회논문지SD
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• 제47권12호
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• pp.75-82
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• 2010

본 논문은 다중대역 송수신기 CMOS RFIC 단일 칩을 위한 광대역 델타시그마 분수분주형 주파수합성기에 관한 것이다. 광대역 VCO의 LC Tank에 6-bit Switched Capacitor Array Bank를 작용하여 2340~3940 MHz의 출력주파수 범위를 가지도록 하였으며, 위상동기 전 Capacitor Bank Code를 선택하기위한 VCO Frequency Calibration 회로는 전체 주파수대역에서 $2{\mu}s$이하로 보정을 마치는 뛰어난 성능을 보여준다. 광대역 VCO로부터 T-DMB/DAB/FM Radio의 LO 신호를 생성하기 위해 선택 가능한 다중분주비 ${\div}2$, ${\div}16$, ${\div}32$를 가지는 LO 신호 발생기는 L-Band (1173 ~ 1973 MHz), VHF-III (147 ~ 246 MHz), VFH-II (74~123 MHz)에서 I/Q신호를 생성한다. Integrated Phase Noise는 전체 대역에서 0.8 degree RMS 이하로 측정되어 매우 낮은 위상잡음을 보여주었다. 또한, VCO Frequency Calibration 시간을 포함하는 주파수합성기의 전체 동기시간은 $50{\mu}s$ 이하로 측정되었다. 이 광대역 델타시그마 분수분주형 주파수합성기는 $0.13{\mu}m$ CMOS공정으로 제작되었으며, 1.2 V 전원전압에서 15.8 mA의 전류를 소모한다.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2003년도 ICCAS
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• pp.1891-1895
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• 2003

Switch-mode power supplies (SMPS) have become a major source of conducted electromagnetic interference (EMI) which is the combination between differential mode (DM) noise and common mode (CM) noise. This paper presents the conducted EMI reduction approach in flyback switched mode power supply by rerouting for circuit balance to reduce common mode noise. And differential mode noise can be reduce by adding $c_x$ capacitor across the input power line, and passive element to the gate drive of switching device MOSFET to slow down the switching times. This combination of our approach is the effective way to reduce the conducted EMI and it is also a cost effective for product design

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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• pp.481-484
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• 2003

A strategy for a torque ripple reduction drive of single-phase SRM with high power factor is proposed. The drive for switched reluctance motor (SRM) is presented to achieve sinusoidal, near unity power factor input current with low torque ripple. The proposed SRM drive has no additional active switch. And a single-stage approach, which combines a DC link capacitor used as dc source and a drive used for driving the motor into one power stage, has a simple structure and low cost. The characteristics and validity of the proposed circuit is discussed in depth through the experimental results.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 추계학술대회 논문집 전력기술부문
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• pp.366-367
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• 2008

This paper deal with the study of the phenomenon of Ferroresonance in the 170kV Gas Insulated Switchgear(GIS). The Electromagnetic Transient Program(EMTP) was used to simulate the phenomenon of Ferroresonance and conducted the study of the transient over-voltage. An example power system, used in this study, have an accident that the ferroresonance phenomenon happens at MOFVT(Voltage Transformer). The simulation results notices that the secondary part of VT has to be connected by ferroresonance suppressor when the circuit breaker connected with grading capacitor is switched off.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.959-962
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• 2004

A strategy for a torque ripple reduction drive of single-phase SRM with high power factor is proposed. The drive for switched reluctance motor (SRM) is presented to achieve sinusoidal, near unity power factor input current with low torque ripple. The proposed SRM drive has no additional active switch. And a single-stage approach, which combines a DC link capacitor used as do source and a drive used for driving the motor into one power stage, has a simple structure and low cost. The characteristics and validity of the proposed circuit is discussed in depth through the experimental results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(1)
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• pp.308-311
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• 2004

A novel single-stage power factor corrected (PFC) drive for switched reluctance motor (SRM) is presented to achieve sinusoidal, near unity power factor input current. The proposed PFC SRM drive has no additional active switch. And a single-stage approach, which combines a DC link capacitor used as do source and a drive used for driving the motor into one power stage, has a simple structure and low cost. The characteristics and validity of the proposed circuit will be discussed in depth through the experimental results.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.215-217
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• 2006

This paper presents an area efficient 8-bit current digital to analog convector (DAC) which is applied to 240 channels Active Matrix - Organic Light Emitting Diode (AMOLED) data driver. The proposed circuit constitutes 4-bit binary weighted current DAC and 4-bit switched capacitor cyclic DAC. The proposed DAC has about 70% smaller area than that of the typical binary weighted current DAC. We overcome sampling time by reducing the number of repetition phases so that it can display 8-bit gray scale image.

• 한국통신학회논문지
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• 제21권12호
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• pp.3246-3255
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• 1996

A threshold voltage extraction scheme which does not need matched replica of the MOSFET under test is proposed. In contrast to alternative methods, the accuracy of the proposed scheme does not depend on the matching of the test transistors. The proposed scheme has been implemented in a matching-free way using a switched-capacitor subtracting ampliier and a dynmic current mirror. Nonideal effects associated with these circuits, such as non-zero offset voltages and finite gains of op-amps, capcitor mismateches, and charge injection of MOS switches, are investigated and compensated. The circuit has been designed using ISRC 1.5.mu.m CMOS process parameters andfabricated at Inter-University semiconductor Research Center, and its performance has been evaluated.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.1103-1104
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• 2008

In this paper, authors propose a novel step-up AC-DC chopper operated with power factor correction (PFC) and with high efficiency. The proposed chopper behaves with discontinuous current control (DCC) of input current. The input current waveform in the proposed chopper is got to be a discontinuous sinusoid form in proportion to magnitude of ac input voltage under the constant duty cycle switching. Therefore, the input power factor is nearly unity and the control method is simple. In the general DCC chopper, the switching devices are turned-on with the zero current switching, but turn-off of the switching devices is switched at current maximum value. To achieve a soft switching of the switching turn-off, the proposed chopper is used a new partial resonant circuit. The result is that the switching loss is very low and the efficiency of chopper is high.