• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.264-267
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• 2002

This paper presents the design of a pipelined virtual output queue routing engine for an advanced input-queued ATM switch, which has a serial cross bar structure. The proposed routing engine has been designed for wire-speed routing with a pipelined buffer management. It provides the tolerance of requests and grants data transmission latency between the routing engine and central arbiter using a new request control method that is based on a high-speed shifter. The designed routing engine has been implemented in a field programmable gate array (FPGA) chip with a 77MHz operating frequency, 16$\times$16 switch size, and 2.5Gbps/port speed.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.3
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• pp.55-64
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• 2013

In this paper, a new topology which can add a small reactor in series to a condenser-bank type reactive power compensator to limit current is proposed. And also the proposed topology can add or remove a power condenser safely without any addition of inrush-current suppression resistance. The proposed method tests variable resistance of the drain source of a switching device which is controlled by gate voltage in a two-way switch with a diode rectifier and FET switch. In other words, the proposed method is a inrush-current suppression method with the structure of variable resistance. In particular, the proposed method creates smooth current without any resonance in inrush-current as well as is not limited by the time of switch on and off.

• Journal of Practical Engineering Education
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• v.8 no.2
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• pp.95-101
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• 2016

In this paper, we introduce an implementation method of switch-based LED (Light Emitting Diode) Art logic circuits to help understanding the operation principle of digital logic circuits. Digital logic circuit practice using bread board is widely practiced in colleges or high schools in South Korea. However, actual digital logic circuit practice lacks examples of basic implementation, and as results of this problem, study with more complicated examples disturbs understanding the basic operation principle of digital logic circuits. Therefore, we proposed and tested an implementation method of switch-based LED Art logic circuits to help understanding the necessity of digital logic circuits which control signals of multiple output devices simultaneously.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.10a
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• pp.794-797
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• 2005

The automatic load transfer switch (ALTS), a kind of electric power switch, typically automatically transfers electrical loads from a normal electrical power source to an emergency electrical power source upon reduction or loss of normal power source voltage. It can also automatically re-transfer the load to the normal power source when the normal voltage has been restored within acceptable limits. The transfer operation of ALTS is accomplished by a spring-driven linkage mechanism. In order to control or delay the transfer switching time, the ALTS studied in this paper uses the superposed leaf springs, which are subjected to impact leadings in contacting with electrical contacts. Therefore, to confirm whether the springs has enough mechanical endurance in ALTS, we build a finite element model of the superposed lear springs using LS-DYNA and perform the impact and fatigue analysis.

• Journal of the Korea Institute of Military Science and Technology
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• v.27 no.2
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• pp.197-202
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• 2024

In this study, we propose a method to improve the durability of rotorcraft switches. Additionally, the appropriate verification test results are presented. As a result of analyzing the defective switch, it was found that the contact was defective due to long-term use. It was confirmed that stable contact of the terminal is necessary to achieve appropriate performance. We manufactured a switch with one spring and a switch with two springs. As a result of the verification test using this, it was found that the durability of the improved shape was improved by 15 % compared to the existing shape. Those numbers have merit from an operational perspective. This has the effect of reducing the number of replacements per aircraft.

• Journal of Power Electronics
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• v.15 no.5
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• pp.1305-1317
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• 2015

Distributed generation systems (DGSs) have been getting more and more attention in terms of renewable energy use and new generation technologies in the past decades. The self-excited induction generator (SEIG) occupies an important role in the area of energy conversion due to its low cost, robustness and simple control. Unlike synchronous generators, the SEIG has to absorb capacitive reactive power from the outer device aiming to stabilize the terminal voltage at load changes. This paper presents a novel static VAR compensator (SVC) called a magnetic energy recovery switch (MERS) to serve as a voltage controller in SEIG powered DGSs. In addition, many small scale SEIGs, instead of a single large one, are applied and devoted to promote the generation efficiency. To begin with, an expandable mathematic model based on a d-q equivalent circuit is created for parallel SEIGs. The control method of the MERS is further improved with the objective of broadening its operating range and restraining current harmonics by parameter optimization. A hybrid control strategy is developed by taking both of the stand-alone and grid-connected modes into consideration. Then simulation and experiments are carried out in the case of single and double SEIG(s) generation. Finally, the measurement results verify that the proposed DGS with SVC-MERS achieves a better stability and higher feasibility. The major advantages of the mentioned variable reactive power supplier, when compared to the STATCOM, include the adoption of a small DC capacitor, line frequency switching, simple control and less loss.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.3
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• pp.629-642
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• 1996

ATM switch handles the traffic for a wide range of appliations with different QOS(Quality-of-Service) requirements. In ATM switch, the priority control mechanism is needed to improve effectively the required QOS requirements. In this paper, we propose a priority control mechanism using the cell transfer ratio type and discard threshold in order to archive the cell loss probability requirement and the delay requirement of each service class. The service classes of our concern are the service class with high time priority(class 1) and the service class with high loss priority control mechanism, cells for two kind of service classes are stored and processed within one buffer. In case cells are stored in the buffer, cells for class 2 are allocated in the stored and processed within one buffer. In case cells are stored in the buffer, cells for class 2 are allocated in the shole range of the buffer and cells for class 1 are allocated up to discard threshold of the buffer. In case cells in the buffer are transmitted, one cell for class 1 is transmitted whenever the maximum K cells for class 2 are transmitted consecutively. We analyze the time delay and the loss probability for each class of traffic using Markov chain. The results show that the characteristics of the mean cell delay about cells for class 1 becomes better and that of the cell loss probability about cells for class 2 becomes better by selecting properly discard threshold of the buffer and the cell transfer ratio according to the condition of input traffic.

• Journal of Korean Society of Water and Wastewater
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• v.33 no.5
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• pp.329-339
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• 2019

Recently, the advancement of information and communication technology(ICT) is expanding the connectivity through Internet of Things(IoT), and the media of connection is also expanding from wire/cable transmission to broadband wireless communication, which has significantly improved mobility. This hyperconnectivity has become a key element of the fourth industrial revolution, whereas the supervisory control network of purification plants in korea is operated as a communication network separated from the outside, thereby lagging in terms of connectivity. This is considered the best way to ensure security, and thus there is hardly any consideration of establishing alternatives to operate an efficient and stable communication network. Moreover, security for management of a commercialized communication network and network management solution may be accompanied by immense costs, making it more difficult to make new attempts. Therefore, to improve the conditions for the current supervisory control network of purification plants, this study developed a industrial security L2 switch that supports modbus TCP(Transmission Control Protocol) communication and encryption function of the transmission section. As a result, the communication security performance improved significantly, and the cost for implementing the network management system using Historical Trend and information of HMI(Human Machine Interface) could be reduced by approximately KRW 200 million. The results of this study may be applied to systems for gas, electricity and social safety nets that are infrastructure communication networks that are similar to purification plants.

• The Transactions of the Korea Information Processing Society
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• v.6 no.1
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• pp.148-158
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• 1999

ABR traffic form ATM LAN is controlled through RM cell, and the interface function to public ATM network is necessary to provide ABR service efficiently. This paper presnets new interface architecture, which is based on "Projected Node" [6]. using AIPU(ABR Interface Proxy Unit) to support ABR traffic streams incoming from ATM LAN in the public ATM network. For the efficient interworking, the AIPU has designed for interworking functions with ERICA switch mechanism. Conventional ERICA switch mechanism specified in TM 4.0 is basically used for short distance comparative to public network, however AIPU adopts the novel control mechanism to cover logng roud trip time (RTT). To improve the problems and to provide a dynamic range of UCI(Update Count Interval), this paper proposes, a novel control scheme, DUCI ( Dynamic Update Count Interval. And the paper shows inefficiencies of ERICA mechanism with fixed UCI through the simulation results, and represents the performance enhancement of DUCI mechanism developed to adjust the update count interval dynamically.

• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.1
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• pp.101-108
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• 2017

As the quantum gate matrix is a $r^{n+1}{\times}r^{n+1}$ dimension when the radix is r, the number of control state vectors is n, and the number of target state vectors is one, the matrix dimension with increasing n is exponentially increasing. If the number of control state vectors is $2^n$, then the number of $2^n-1$ unit matrix operations preserves the output from the input, and only one can be performed the unitary operation to the target state vector. Therefore, this paper proposes a new method of function embedding that can replace $2^n-1$ times of unit matrix operations with deterministic contribution to matrix dimension by arithmetic power switch of the unitary gate. The proposed function embedding method uses a binary literal switch with a multivalued threshold, so that a general purpose hybrid MCU gate can be realized in a $r{\times}r$ unitary matrix.