• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.8
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• pp.37-43
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• 2008

This paper introduces a high-speed low-power self-timed current-mode logic (STCML) that reduces both dynamic and leakage power dissipation. STCML significantly reduces the leakage portion of the power consumption using a pulse-mode control for shorting the virtual ground node. The proposed logic style also minimizes the dynamic portion of the power consumption due to short-circuit current by employing an enhanced self-timing buffer. Comparison results using a 80-nm CMOS technology show that STCML achieves 26 times reduction on leakage power consumption and 27% reduction on dynamic power consumption as compared to the conventional current-mode logic. They also indicate that up to 59% reduction on leakage power consumption compared to differential cascode voltage switch logic (DCVS).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.5
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• pp.703-717
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• 2002

This paper illustrates the implementation of a scalable shared buffer asynchronous transfer mode (ATM) switch. The designed shared buffer ATM switch has a shared buffet of a pipelined memory which has the access time of 4 ns. The high-speed buffer access time supports a possibility of the implementation of a shared buffer ATM switch which has a large switching capacity. The designed switch architecture provides flexible switching performance and port size scalability with the independence of queue address control from buffer memory control. The switch size and the buffer size of the designed ATM switch can be reconfigured without serious circuit redesign. The designed prototype chip has a shared buffer of 128-cell and 4 ${\times}$ 4 switch size. It is integrated in 0.6um, double-metal, and single-poly CMOS technology. It has 80MHz operating frequency and supports 640Mbps per port.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.1
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• pp.74-80
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• 2007

This paper proposes the novel open-fault detection/isolation scheme of inverter switch in two-phase excited VSI. This scheme identify open-fault using voltage sensor at lower switches of each phase according to the operating mode. It has benefit of simple implementation, fast detection and robustness in the load so that stab of the system is improved. Also, at faulty mode, it minimizes faulty effect and makes possible continuous operation through the reconfiguration procedure applying four-switch operation. The validity of proposed fault detection scheme is verified by experimental results.

• Proceedings of the KIEE Conference
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• 1991.11a
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• pp.210-213
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• 1991

The clamp mode Zero-Volatge-Switched Multi-Resonant-Converter(ZVS-MRC) is proposed. In the converter, the performance of the conventional ZVS-MRC is improved by clamping the drain-to-source voltage of the power switch using a soft switching nondissipative active clamp network. The analysis for each stage of the converter operation modes is presented and is verified by experiments.

• Proceedings of the Optical Society of Korea Conference
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• 1989.02a
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• pp.119-122
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• 1989

An intermodal switch based on optically-induced (through optical Kerr effect) periodic coupling in a two-mode waveguide is described and demonstrated. A high power pump beam injected into the two modes of the waveguide produced a periodic modulation of the refractive index profile with a period of modal beat length. this causes an intermodal coupling of the prove beam. The operating principle was successfully demonstrated in an elliptical core two-mode fiber with a counter-propagating pump-probe scheme.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.327-332
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• 1999

In this paper, six harmonic injection PWM method for reducing total harmonic distortion in single switch three phase discontinuous conduction mode boost converter is presented. In the proposed method, periodic six harmonic voltage is injected in the control circuit to vary the duty ratio of the converter switch within a line cycle so that the fifth order harmonic of the input current is reduced. Experimental results are verified by converter operating at 400V/6kW with three phase 140V~220V input.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.2112-2114
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• 1998

A gate driver suitable for forced switch-mode power converters such as UPS and motor drive system is presented. The proposed gate driver uses regenerated snubber power and requires no separate power supply. This does not impose any additional complexity on the main switch. Experimental results show that the proposed circuit is valid.

• Proceedings of the KIPE Conference
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• 2011.11a
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• pp.44-45
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• 2011

Research on photovoltaic (PV) generation is taking a lot of attention due to its infinity and environment-friendliness with decrease of price per PV cell. While central inverters connect group of PV modules to utility grid in which maximum power point tracking (MPPT) for each module is difficult, micro inverter is attached on each module so that MPPT for individual modules can be easily achieved. Moreover, energy generation and consumption efficiency can be much improved by employing direct current (DC) distribution system. In this paper, a digitally controlled PV micro converter interfacing PV to DC distribution system is proposed. Boundary conduction mode (BCM) is utilized to achieve zero voltage switching (ZVS) of active switch and eliminate reverse recovery problem of passive switch. A 120W prototype boost PV micro converter is implemented to verify the feasibility and experimental results show higher than 98% efficiency at peak power and 97.29% of European efficiency.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.8
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• pp.392-401
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• 2001

This paper presents the single-stage high power factor AC to DC converter operated in active-clamp mode. The proposed converter is added active-clamping circuit to boost-flyback single-stage power factor corrected power supply. The active-clamping circuit limits voltage spikes, recycles the energy trapped in the leakage inductance, and provides a mechanism for achieving soft switching of the electronic switches to reduce the switching loss. The auxiliary switch of active-clamping circuit uses the same control and driver circuit as the main switch to reduce the additional cost and size. To verify the performance of the proposed converter, a 100W converter has been designed. The proposed converter gives good power factor correction, low line current harmonic distortions, and tight output voltage regulation, as used unity power factor.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1861-1868
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• 2016

In this paper, a three-phase AC-DC high step-up converter is developed for application to microscale wind-power generation systems. Such an AC-DC boost converter prossessess the property of the single-switch high step-up DC-DC structure. For power factor correction, the advanced half-stage converter is operated under the discontinuous conduction mode (DCM). Simulatanously, to achieve a high step-up voltage gain, the back half-stage functions in the continuous conduction mode (CCM). A high voltage gain can be obtained by use of an output-capacitor mass and a coupled inductor. Compared to the output voltage, the voltage stress is decreased on the switch. To lessen the conducting losses, a low rated voltage and small conductive resistance MOSFETs are adopted. In addition, the coupled inductor retrieves the leakage-inductor energy. The operation principle and steady-state behavior are analyzed, and a prototype hardware circuit is realized to verify the performance of the proposed converter.