• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.505-507
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• 2008

A conventional active-clamp forward (ACF) converter is a favorable candidate in low-to-medium power applications. However, the switches suffer from high voltage stress, i.e., sum of the input voltage and the reset capacitor voltage. Therefore, it is not suitable for high input voltage applications such as a front-end converter of which the input voltage is about 400-$V_{dc}$. To solve this problem, three-switch ACF (TS-ACF) converter, which employs two main switches and one auxiliary switch with low voltage stress, is proposed. Utilizing low-voltage rated switches, the proposed converter is promising for high input voltage applications with high efficiency and low cost.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.8
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• pp.82-89
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• 2014

The industrial products to use single phase inverter are raised the necessity of power quality improvement, such as AC Motor Driver, Lighting, Renewable energy power converter. Also, it is increasing that applied the single phase multilevel inverter for high quality power at renewable energy power converter. Especially, the photovoltaic multilevel inverters have at least more than two DC_Link and more than one DC/DC Converter. This paper proposes a triple output DC/DC Converter with one switch for photovoltaic multilevel inverter. The proposed converter has advantages of low cost and volume because it has one switch. The operation principle of the converter is analyzed and verified. A prototype is implemented to verify of the proposed converter.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.318-328
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• 2011

Stage-level reconfigurable chip multiprocessor (CMP) aims to achieve highly reliable and fault tolerant computing by using interwoven pipeline stages and on-chip interconnect for communicating with each other. The existing crossbar-switch based stage-level reconfigurable CMPs offer high reliability at the cost of significant area/power overheads. These overheads make realizing large CMPs prohibitive due to the area and power consumed by heavy interconnection networks. On other hand, area/power-efficient architectures offer less reliability and inefficient stage-level resource utilization. In this paper, I propose a hierarchical multiplexing interconnection structure in lieu of crossbar interconnect to design area/power-efficient stage-level reconfigurable CMP. The proposed approach is able to keep the reliability offered by the crossbar-switch while reducing the area and power overheads. Experimental results show that the proposed approach reduces area by up to 21% and power by up to 32% when compared with the crossbar-switch based interconnection network.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.224-225
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• 2013

This paper describes the four switch three-phase Z-source active power filter. This novel configuration has many advantages like reduction of cost, switching loss and smaller drive circuit. The paper presents an application of direct current control(DCC) method in a three-phase parallel Z-source active power filter to reduce the harmonics generated by the nonlinear load. The compensation principles and dynamics of the system are discussed in detail. The results show that the proposed control strategy is feasible and efficient.

• Journal of Electrical Engineering and Technology
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• v.5 no.2
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• pp.290-298
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• 2010

This paper proposes an adaptive carrier-based pulse width modulation (PWM) method for a four-switch three-phase (4S3P) inverter under dc-link voltage ripple conditions. The proposed method guarantees balanced output currents despite of the existence of the voltage oscillations across two dc-link capacitors. And also, this new approach achieves a linear over-modulation with calculation time reduction. Simulation and experimental results are given to validate the feasibility of the proposed method.

• Journal of Power Electronics
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• v.10 no.6
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• pp.702-708
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• 2010

In this paper, a fault diagnosis algorithm for brushless DC (BLDC) motor drives is proposed to maintain control performance under switch open-damage. The proposed fault diagnosis algorithm consists of a simple algorithm using measured phase current information and it detects open-circuit faults based on the operating characteristic of BLDC motors. The proposed algorithm quickly recovers control performance due to its short detection time and its reconfiguration of the system topology. It can be embedded into existing BLDC drive software as a subroutine without additional sensors. The feasibility of the proposed fault diagnosis algorithm is proven by simulation and experimental results.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1978-1979
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• 2007

In this paper, the authors introduce a high-speed microprocessor based on automatic vacuum capacitor switch with a modified digital filter design using distributed arithmetic. The automation trends particularly the automatic vacuum capacitor switch has helped ameliorate the power factor essentials and automatically triggered to close when the line current exceeds rated value. Microprocessor relays use digital filters to extract only the fundamental and attenuate harmonics. To provide optimum speed characteristics a distributed arithmetic based filter design in the microprocessor controller which not only enhances filtering speed but additionally enables lower power consumption at the cost of area has been introduced. The result is a unified description that describes a digital filter structure down to bit level.

• Journal of Power Electronics
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• v.14 no.1
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• pp.48-60
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• 2014

Multilevel inverters have been widely used for high-voltage and high-power applications. Their performance is greatly superior to that of conventional two-level inverters due to their reduced total harmonic distortion (THD), lower switch ratings, lower electromagnetic interference, and higher dc link voltages. However, they have some disadvantages such as an increased number of components, a complex pulse width modulation control method, and a voltage-balancing problem. In this paper, a novel nine-level reduced switch cascaded multilevel inverter based on a multilevel DC link (MLDCL) inverter topology with reduced switching components is proposed to improve the multilevel inverter performance by compensating the above mentioned disadvantages. This topology requires fewer components when compared to diode clamped, flying capacitor and cascaded inverters and it requires fewer carrier signals and gate drives. Therefore, the overall cost and circuit complexity are greatly reduced. This paper presents modulation methods by a novel reference and multicarrier based PWM schemes for reduced switch cascaded multilevel inverters (RSCMLI). It also compares the performance of the proposed scheme with that of conventional cascaded multilevel inverters (CCMLI). Simulation results from MATLAB/SIMULINK are presented to verify the performance of the nine-level RSCMLI. Finally, a prototype of the nine-level RSCMLI topology is built and tested to show the performance of the inverter through experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.6
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• pp.561-568
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• 2011

This paper describes the operation characteristic of a single-phase PFC converter with 1-switch voltage doubler strategy for single-phase double-conversion UPS. A single-phase PFC converter with 1-switch voltage doubler strategy needs a diode bridge and one bidirectional active switch. Thus it is possible to reduce the material cost. However, the study results of operation characteristic and controller design has not been known after the converter circuit was proposed. For the performance evaluation of PFC converter, single-phase 3kVA double-conversion UPS was tested. The performance of PFC converter is experimentally confirmed with followings - input current reference traking, input power factor correction.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.1
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• pp.1-7
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• 2012

This paper describes the performance comparison results for current controller of a single-phase PFC converter with 1-switch voltage doubler strategy for single-phase double-conversion UPS(Uninterruptible Power Supply). A single-phase PFC converter with 1-switch voltage doubler strategy needs a diode bridge and one bidirectional active switch. Thus it is possible to reduce the material cost. However, the study results of current controller design and comparison of current control method has not been known after the converter circuit was proposed. For the performance comparison of current control, single-phase 3 kVA double-conversion UPS was tested. The performance of PI and PR current controller is experimentally confirmed with followings - input current reference tracking, input power factor correction and input current THD suppression.