• 제목/요약/키워드: Sustain waveform

검색결과 38건 처리시간 0.046초

Design of Cost-Effective Driving Waveform Based on Vt Close Curve Analysis in AC Plasma Display Panel

  • Cho, Byung-Gwon;Tae, Heung-Sik;Ito, Kazuhiro;Song, Jun-Weon;Lee, Myoung-Kyu;Kim, Sang-Chul;Jung, Nam-Sung;Lee, Kwang-Sik
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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    • pp.251-254
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    • 2005
  • A new driving waveform was proposed to reduce the cost in PDP-TV based on Vt close curve by eliminating the common (X) board under the conventional 42-inch panel structure. Due to the serious misfiring problem during a sustain-period when applying the new driving waveform, the wall voltage was measured and analyzed after the reset-period using Vt close curve. As a result of adopting the proposed driving waveform designed using Vt close curve analysis, the cost of PDP module could reduce compared with the conventional PDP module without any misfiring discharge.

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AC 플라즈마 디스플레이 패널에서의 최적 구동 파형 및 최적 가스 흔합비에 관한 연구 (A study on optimal drive waveform and optimal gas mixing ratio of Plasma Display Panel)

  • 최훈영;박헌건;이석현
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 E
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    • pp.1721-1723
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    • 1997
  • In AC Plasma Display Panel(PDP), serious problems are low radiation brightness and very high discharge voltage. To solve these problems, it is necessary to obtain optimal frequency of drive waveform and optimal gas mixing ratio. This paper presents firing voltage and sustain voltage as frequency of waveform and gas mixing ratio, and proposes optimal frequency of drive waveform and optimal gas mixing ratio.

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Effect of Scan-bias during Reset Period in a Negative Waveform

  • Park, W.H.;Lee, S.J.;Lee, J.Y.;Kang, J.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.728-731
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    • 2009
  • A negative waveform having inverted polarity of conventional waveform during reset and sustain periods was proposed to improve the driving characteristics. In order to control the negative wall-charge distribution, a positive bias on the scan electrode was applied during reset period. Compared to 0 V scan-bias condition, at 8 V scan-bias the formative time lag was improved about 23.95 % and the average time lag was improved about 14.91 %. All experiments were performed with the 42-inch PDP module in XGA resolution.

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AC-PDP의 유지방전 전극사이의 간격과 어드레스 방전 특성과의 상관성 분석 (The Analysis of the Correlation between the Sustain-Electrode Gap of an AC-PDP and Address Discharge Characteristics)

  • 이영준;최수삼;박세광;김용득
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제55권5호
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    • pp.239-244
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    • 2006
  • To drive the high-image quality plasma displays of XGA and/or full-HD, we must effectively improve the driving waveform, which get the reset period for the stabilized control of wall charges, the address period to select discharge or non-discharge, and sustain period for luminance in 1 TV-frame, and also the display quality. To accomplish them, the development of the technology for the fast address discharge is required. In this paper, the correlation between the sustain-electrode gap and address discharge characteristics for the high-speed addressing was analyzed using the measurements of dynamic voltage margins. Results showed that the narrower the gap between the sustain electrodes, the narrower the with of the scan pulse became and a dynamic margin of data voltage of 29.2 V was obtained at scan pulse width of $1.0{\mu}s\;and\;V_{ramp}$ of 240 V for driving 4-inch test penal, which the gap between sustain electrodes was $65{\mu}m$.

AC PDP에서 2차원 수치해석을 이용한 Ramp Reset 구동파형에 따른 방전 특성 분석 (The Discharge Characteristic Analysis of a Ramp Reset Waveform Using a 2-Dimensional Numerical Simulation in AC PDP)

  • 박석재;최훈영;서정현;이석현
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제53권12호
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    • pp.606-615
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    • 2004
  • The discharge characteristics of a ramp reset waveform in the alternating current plasma display panel(ac PDP) were studied using a 2-dimensional numerical simulation. We analyzed the wall charge variation during the reset discharge, address discharge and sustain discharge adopting a ramp reset waveform. Then we investigated the principal parameters for a successful discharge. In this paper, we suggest a new parameter, printing particles' density and its effects on the stability of the ramp discharge. The maximum current flows of the three electrodes during the ramp reset period were decreased with the increase in the priming particles's density which was explained with the wall charge characteristics and the current flow characteristics obtained by a 2-D simulation.

AC PDP에서 고속 어드레싱을 위한 네거티브 리셋 파형 및 구동회로의 구현 (Implementation of the Negative Reset Waveform and Driving Circuit for High Speed Addressing in AC PDP)

  • 임현묵;임승범;이준영;강정원;홍순찬
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2007년도 추계학술대회 논문집
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    • pp.215-217
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    • 2007
  • Recently, the demand for high definition TV is being increased by beginning of the digital broadcasting. The higher resolution of PDP is, the longer addressing time become, then, the sustain period for display image decreases. Because of the reason, dual-scan method which synchronously write information of an image on top and bottom of the screen is used for the high definition PDP. However, as the price competition of PDP becomes severe, we can`t avoid turning to a single-scan method which uses only a half of an expensive address IC. Accordingly, the sustain period becomes much shorter than prior method. In case of XGA level, it is impossible to display, eventually. In this paper, we are going to prove usefulness by realizing negative reset waveform and the driving circuit for high speed addressing.

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An Energy Recovery Circuit for AC Plasma Display Panel with Serially Coupled Load Capacitance-SER1

  • Yang, Jin-Ho;Whang, Ki-Woong;Kang, Kyoung-Ho;Kim, Young-Sang;Kim, Hee-Hwan;Park, Chang-Bae
    • Journal of Information Display
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    • 제2권4호
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    • pp.63-67
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    • 2001
  • The switching power loss due to the panel capacitance during sustain period in AC PDP driving system can be minimized by using the energy recovery circuits. We proposed a new energy recovery circuit, SER1 (Seoul national univ. Energy Recovery circuit 1st). The experimental results of its application to a 42-inch surface discharge type AC PDP showed superior performance of SER1 in energy recovery efficiency and low distortion voltage waveform. Energy recovery efficiency of SER1 was measured up to 92.3 %, and the power dissipation during the sustain period was reduced by 15.2 W in 2000 pulse/frame compared with serial LC resonance energy recovery circuit.

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AC PDP의 배경광 잔상특성 (Characteristics of Image Sticking Observed During Background Display in AC-PDP)

  • 류재화;임성현;김동현;김중균;이호준;박정후
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제53권2호
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    • pp.91-96
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    • 2004
  • In darkroom condition, it was observed that a white picture pattern lasted several minutes leaves a recognizable trace in subsequent black background picture. Although this is not a serious problem for the most current public display or home TV applications, the image sticking should be minimized for future high quality multimedia display applications. In order to characterize this picture memory effect having relatively long time scale, spatially resolved luminance measurement and light waveform measurement have been performed. Pixels located at the outer boundary of white pattern previously displayed shows highest luminance. These cells also shows fastest ignition at the ramp up reset sequence. The luminance and ignition voltage differences between boundary cells and the other cells are increased with display duration and number of sustain-pulse. It is speculated that image sticking observed at the boundary cell is originated from the transport of charged particles and re-deposition of reactive species such as Mg, O provided from strong sustain discharge region.

중간간격을 갖는 교류형 플라즈마 디스플레이 표시기의 소거파형 연구 (Design of Erase Waveform for Stabilizing Reset Discharge in Mid-gap AC Plasma Display Panels)

  • 윤수한;서정현
    • 전기학회논문지
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    • 제60권5호
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    • pp.993-998
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    • 2011
  • In this paper we suggest new criteria for the classification of the electrode gap between common and scan electrodes. The electrode gap is categorized as a short, middle, and long gap according to the criteria. Among these structures, we focus on the erase waveform of a mid-gap structure. we report an unstable discharge arising from the erase ramp period in a mid-gap structure. Based on the Vt close curve, we analyze the unstable discharge at various conditions. Our analysis reveals that the unstable discharge is ignited between surface electrodes and caused by un-erased wall charges accumulated on the outer edges of electrodes. By reducing the voltage level of the last sustain pulse, the problem is solved.

The Influence of Xe Content on Wall Voltage Transfer Behavior

  • Baik, Bong-Joo;Choi, Kwang-Yeol;Min, Wong-Kee;Hong, Mun-Heon;Lee, Dong-Woo;Min, Byung-Kuk;Kim, Weo-Dong
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.1555-1558
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    • 2008
  • Various approaches were undertaken by major PDP makers in order to improve the luminous efficacy of the plasma discharge cells. There have been many reports that state that using a high Xe content PDP is one of the most promising key technologies available to improve the luminous efficacy. In the case of the higher Xe content panel, the higher address and sustain voltage were needed to drive the panel under the same reset condition. In this study, a variety of Xe content panels were investigated in order to examine wall voltage transfer behaviors. The transferred wall voltage status after addressing discharge at the same driving condition was analyzed by comparing Vt close curve of high and low Xe content panels. Through this analysis of Vt close curve difference, the driving waveform of a high Xe panel was quantitatively adjusted Under the same address voltage condition, results showed that the amount of the transferred wall voltage and Vt close curve after addressing discharge was matched for the first sustain discharge. Taking these results into consideration, we conclude that the driving waveform for different Xe content panels could be designed for the desired addressing discharge condition and the wall voltage state of the cell could be quantitatively controlled and measured through these approaches.

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