• Title/Summary/Keyword: Surface Mounting Device

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A New Material for Rapid and Easy Method of Plant Surface Imprinting

  • Bhat, R.B.;Etejere, E.O.
    • Journal of Plant Biology
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    • v.28 no.4
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    • pp.329-332
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    • 1985
  • A simple new device for obtaining very clear epidermal imprints for light microscopic studies is discussed. This new device is developed from“Britfix”(polystyrene cement) which is non-toxic to the plant organs. It involves direct application of the material on the desired surface of the plant organ to obtain thin, transparent replica. From the present investigation“Britfix”is found to be useful for the study of epidermal anatomy, morphology and physiology. Epidermal imprints can be mounted on the microscope slide without a mounting medium. Permanent slide of these imprints can be kept for any desired period without any deterioration of the replica.

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The surface mounting technology to prevent improper fine chip insertions by using fiber sensors (Fiber sensor를 이용한 미소칩 미삽 방지 표면실장기술)

  • Kim, Young-Min;Kim, Hyun-Jong;Um, Sun-Chon;Kong, Heon-Tag;Kim, Chi-Su
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.9
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    • pp.4138-4146
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    • 2011
  • In surface mount technology, with cellular phones and flat panel displays shrinking in size, the electric goods for making these things are getting smaller as well. Therefore, the technology of mounting components such as 0402 and 0603 Chip is on the rise. The chip mount manufacturing companies have studied the mount technology to prevent the missing insertions or improper insertion. This study suggests arranging the mechanical structure by using fiber sensors to eliminate missing insertions or improper insertions and developing the technology for upgrading system algorithms.

Thermal Resistance Modeling of Linear Motor Driven Stages for Chip Mounter Applications (칩 마운터용 리니어 모터 스테이지의 열저항 모델링)

  • Jang, Chang-Su;Kim, Jong-Yeong;Kim, Yeong-Jun
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.26 no.5
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    • pp.716-723
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    • 2002
  • Heat transfer in linear motor driven stages for surface mounting device applications was investigated. A simple one-dimensional thermal resistance model (TRM) was introduced. In order to reduce three-dimensional nature to one-dimensional, a few assumptions and simplifications were employed suitably. A good agreement with a finite element heat transfer analysis in temperature profile was obtained. For validation, the analysis was compared with the measurement with respect to motor driving power. Overall discrepancy was less than 7$^{\circ}C$. The influence of two high thermal resistance parts, insulation sheet and thermal contact between the coil assembly and the mounting plate, was examined through the analysis. Additionally, the thermal resistance analysis was applied to another stage including an internal cooling-air passage, and was found available for this system as well. After validation, the cooling effect was surveyed in terms of motor power, and cooling-air and -water flow rate.

Thermal Resistance Modeling of Linear Motor Driven Stages for Chip Mounter Applications (칩 마운터용 리니어 모터 스테이지의 열저항 모델링)

  • Jang, Chang-Soo;Kim, Jong-Young;Kim, Yung-Joon
    • Proceedings of the KSME Conference
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    • 2001.11b
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    • pp.96-101
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    • 2001
  • Heat transfer in linear motor driven stages for surface mounting device applications was investigated. A simple one-dimensional thermal resistance model was introduced. In order to reduce three-dimensional nature to one-dimensional, a few assumptions and simplifications were employed suitably. A good agreement with a finite element heat transfer analysis in temperature profile was obtained. For validation, the analysis was compared with the measurement with respect to motor driving power. Overall discrepancy was less than $7^{\circ}C$. The influence of two high thermal resistance parts, insulation sheet and thermal contact between the coil assembly and the mounting plate, was examined through the analysis. Additionally, the thermal resistance analysis was applied to another stage including an internal cooling-air passage, and was found available for this system as well. After validation, the cooling effect was surveyed in terms of motor power, and cooling-air flow rate.

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Development of a FIC surface mounting system by a visual sensing device (시각 인식장치에 의한 사각 평면반도체 IC의 자동 탑재 시스템의 개발)

  • 김종형;조용철;조형석;정융섭
    • 제어로봇시스템학회:학술대회논문집
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    • 1989.10a
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    • pp.317-321
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    • 1989
  • The FIC(Flat Integrated Circuits)is widely used for good productivity but very difficult for visual identification. The required position tolerance is 0.05mm and orientation tolerance is 0.25 degree for assembly. The research was performed to detect FIC defects and to estimate the placement of FIC within the tolerances. In this study an automatic visual system is developed, which can successfully perform a fine assembly operation using the cartesian robot.

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A study on the real time inspection algorithm of FIC device in chip mounter (칩 마운터에의 FIC 부품 인식을 위한 실시간 처리 알고리듬에 관한 연구)

  • Ryu, Gyung;Kim, Young-Gi;Moon, Yoon-Sik;Park, Gui-Tae;Kim, Gyung-Min
    • 제어로봇시스템학회:학술대회논문집
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    • 1997.10a
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    • pp.48-51
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    • 1997
  • This paper presents the algorithm of FIC inspection in chip mounter. When device is mounted on the PCB, it is impossible to get zero defects since there are many problems which can not be predicted. Of these problems, devices with bent corner leads due to mis-handling and which are not placed at a given point measured along the axis are principal problem in SMT(Surface Mounting Technology). In this paper, we proposed a new algorithm based on the Radon transform which uses a projection to inspect the FIC(Flat Integrated Circuit) device and compared this method with other algorithms. We measured the position error and applied this algorithm to our image processing board which is characterized by line scan camera. We compared speed and accuracy in our board.

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A study of modeling novel DGS 4-port equivalent circuit for mounting active device (능동 소자의 실장을 위한 새로운 DGS구조와 4-port등가 모델링 방법 연구)

  • Son Chang-Sin;Park Jun-Seok;Kim Hyeong-Seok;Lim Jae-Bong
    • 한국정보통신설비학회:학술대회논문집
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    • 2004.08a
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    • pp.386-389
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    • 2004
  • This thesis complemented the weak points that the existing theses did not represented a phase characteristic as the equivalent circuit by applying 4-port simulation to DGS (Defected Ground Structure) characteristic and an equivalent circuit, which are the transmission line structure that has the defect made in the ground surface. We used a distribute device and a lumped device, obtained the equivalent circuit by applying the structure of balun to a discontinuous part. An indicated DGS (Defected Ground structure) is a dumbbells-shaped single defect, we indicated satisfying a magnitude and phase characteristics by applying this equivalent circuit.

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Design of a Rule-Based Solution Based on MFC for Inspection of the Hybrid Electronic Circuit Board (MFC 기반 하이브리드 전자보오드 검사를 위한 규칙기반 솔루션 설계)

  • Ko Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.54 no.9
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    • pp.531-538
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    • 2005
  • This paper proposes an expert system which is able to enhance the accuracy and productivity by determining the test strategy based on heuristic rules for test of the hybrid electronic circuit board producted massively in production line. The test heuristic rules are obtained from test system designer, test experts and experimental results. The guarding method separating the tested device with circumference circuit of the device is adopted to enhance the accuracy of measurements in the test of analog devices. This guarding method can reduce the error occurring due to the voltage drop in both the signal input line and the measuring line by utilizing heuristic rules considering the device impedance and the parallel impedance. Also, PSA(Parallel Signature Analysis) technique Is applied for test of the digital devices and circuits. In the PSA technique, the real-time test of the high integrated device is possible by minimizing the test time forcing n bit output stream from the tested device to LFSR continuously. It is implemented in Visual C++ computer language for the purpose of the implementation of the inference engine using the dynamic memory allocation technique, the interface with the electronic circuit database and the hardware direct control. Finally, the effectiveness of the builded expert system is proved by simulating the several faults occurring in the mounting process the electronic devices to the surface of PCB for a typical hybrid electronic board and by identifying the results.

Mirror Structure Analysis of High Resolution Optical Imaging Payload (고해상도 광학영상장비 반사경 구조해석)

  • Kwon, Woo-Gun;Kim, Kwang-Ro;Lee, Young-Shin
    • Proceedings of the KSME Conference
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    • 2003.04a
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    • pp.462-467
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    • 2003
  • For the Space-borne optical imaging payload system design, light weighting and moderate stiffness of mirror and/or mirror fixation device is very important aspects. The front surface of mirror is regulated by optical performance requirement, but the shape of backplate of mirror is to be optimised while satisfing the required stiffness and weight. According to the results, the best shape of backplate cell is triangular. And also related geometric dimensions and the optimised mounting point of MFD(Mirror Fixation Device) is presented. Finally, natural frequencies and shpaes of mirror structure are analysed.

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A Real-Time Implementation of the Vision System for SMT Automation (SMT자동화를 위한 시각 시스템의 실시간 구현)

  • 전병환;윤일동;김용환;황신환;이상욱;최종수
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.6
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    • pp.944-953
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    • 1990
  • This paper describes design and implementation of a real-time high-precision vision system for an automation of SMT(surface mounting technology ). Also, a part inspection algorithm which calculates the position and direction of SMD(surface mounted device) accurately and performs the ruling using those information are presented, and a parallel processing technique for implementing those algorithms is also described. For a real-time implementation of iage acquisition and processing, several hardware modules, namely, multi-functional A/D-D/A board, frame memory board are developed. Particularly, a PE (processing element) board which employs the DSP56001 DSP (digital signal processor) is developed for the purpose of concurrent processing of part inspection algorithms. A stand-alone vision system is built by integration of the developed hardware modules and related softwares.

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