• Journal of the Korea Institute of Information Security & Cryptology
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• v.15 no.1
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• pp.99-107
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• 2005

ARIA is a 128-bit block cipher having 128-bit, 192-bit, or 256-bit key length. The cipher is a substitution and permutation encryption network (SPN) and uses an involutional binary matrix. This structure was efficiently developed into light weight environments or hardware implementations. This paper shows that a careless implementation of an ARIA on smartcards is vulnerable to a differential power analysis attack This attack is realistic because we can measure power consumption signals at two kinds of S-boxes and two types of substitution layers. By using the two round key, we extracted the master key (MK).

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.11
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• pp.4122-4144
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• 2021

In this fast-paced technological world, the Internet of Things is a ground breaking technology which finds an immense role in the present electronic world which includes different embedded sensors, devices and most other things which are connected to the Internet. The IoT devices are designed in a way that it helps to collect various forms of data from varied sources and transmit them in digitalized form. In modern era of IoT technology data security is a trending issue which greatly affects the confidentiality of important information. Keeping the issue in mind a novel light encryption strategy known as LCB is designed for IoT devices for optimal security. LCB exploits the benefits of Feistel structure and the architectural benefits of substitution permutation network both to give more security. Moreover, this newly designed technique is tested on (Virtex-7) XC7VX330T FPGA board and it takes much little area of 224 GE (Gate Equivalent) and is extremely fast with very less combinational path delay of 0.877 ns. An in-depth screening confirms the proposed work to promise more security to counter cryptographic attacks. Lastly the Avalanche Effect (AE) of LCB showed as 63.125% and 63.875% when key and plaintext (PT) are taken into consideration respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.10a
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• pp.485-487
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• 2017

The whirlpool hash function adopted as an ISO / IEC standard 10118-3 by the international standardization organization is an algorithm that provides message integrity based on an SPN (Substitution Permutation Network) structure similar to AES block cipher. In this paper, we describe the hardware implementation of the Whirlpool hash function. The round block is designed with a 64-bit data path and encryption is performed over 10 rounds. To minimize area, key expansion and encryption algorithms use the same hardware. The Whirlpool hash function was modeled using Verilog HDL, and simulation was performed with ModelSim to verify normal operation.

• The Journal of the Korea institute of electronic communication sciences
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• v.6 no.2
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• pp.171-179
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• 2011

Feistel and SPN are the two main structures in a block cipher. Feistel is a symmetric structure which has the same structure in encryption and decryption, but SPN is not a symmetric structure. Encrypt round function and decrypt round function in SPN structure have three parts, round key addition and substitution layer with S-box for confusion and permutation layer for defusion. Most SPN structure for example ARIA and AES uses 8 bit S-Box at substitution layer, which is vulnerable to Square attack, Boomerang attack, Impossible differentials cryptanalysis etc. In this paper, we propose a SPN which has a symmetric structure in encryption and decryption. The whole operations of proposed algorithm are composed of the even numbers of N rounds where the first half of them, 1 to N/2 round, applies a right function and the last half of them, (N+1)/2 to N round, employs an inverse function. And a symmetry layer is located in between the right function layer and the inverse function layer. The symmetric layer is composed with a multiple simple bit slice involution S-Boxes. The bit slice involution S-Box symmetric layer increases difficult to attack cipher by Square attack, Boomerang attack, Impossible differentials cryptanalysis etc. The proposed symmetric SPN block cipher with bit slice involution S-Box is believed to construct a safe and efficient cipher in Smart Card and RFID environments where electronic chips are built in.

• The KIPS Transactions:PartC
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• v.9C no.4
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• pp.445-452
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• 2002

In this paper, we suggest the design of 128bit block cipher which is provable security based on mathematics theory. We have derived the 16$\times$16 matrix(i.e.,linear transformation) which is numerous active S-box, and we proved for DC and LC which prove method about security of SPN structure cipher algorithm. Also, the minimum number of active S-box, the maximum differential probabilities and the maximum linear probabilities in round function of 128bit block cipher algorithm which has an effect to DC and LC are derived.

• Journal of Korea Society of Industrial Information Systems
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• v.15 no.2
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• pp.1-9
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• 2010

Feistel and SPN are the two main structures in a block cipher. Feistel is a symmetric structure which has the same structure in encryption and decryption, but SPN is not a symmetric structure. In this paper, we propose a SPN which has a symmetric structure in encryption and decryption. The whole operations of proposed algorithm are composed of the even numbers of N rounds where the first half of them, 1 to N/2 round, applies a right function and the last half of them, (N+1)/2 to N round, employs an inverse function. And a symmetry layer is located in between the right function layer and the inverse function layer. In this paper, AES encryption and decryption function are selected for the right function and the inverse function, respectively. The symmetric layer is composed with simple matrix and round key addition. Due to the simplicity of the symmetric SPN structure in hardware implementation, the proposed modified AES is believed to construct a safe and efficient cipher in Smart Card and RFID environments where electronic chips are built in.

• Journal of Korea Multimedia Society
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• v.11 no.8
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• pp.1093-1100
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• 2008

Feistel and SPN are the two main structures in designing a block cipher algorithm. Unlike Feistel, an SPN has an asymmetric structure in encryption and decryption. In this paper we propose an SPN algorithm which has a symmetric structure in encryption and decryption. The whole operations in our SPN algorithm are composed of the even numbers of N rounds where the first half of them, 1 to N/2, applies function and the last half of them, (N+1)/2 to N, employs inverse function. Symmetry layer is executed to create a symmetry block in between function layer and inverse function layer. AES encryption and decryption algorithm, whose safety is already proved, are exploited for function and inverse function, respectively. In order to be secure enough against the byte or word unit-based attacks, 32bit rotation and simple logical operations are performed in symmetry layer. Due to the simplicity of the proposed encryption and decryption algorithm in hardware configuration, the proposed algorithm is believed to construct a safe and efficient cipher in Smart Card and RFID environments where electronic chips are built in.