• ETRI Journal
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• 제39권3호
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• pp.390-397
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• 2017

In this paper, we propose a scheme for designing a tunable pixel layer based on a $Ge_2Sb_2Te_5$ (GST) alloy thin film. We show that the phase change of GST can significantly affect the reflection characteristic when the GST film is embedded into a dielectric encapsulation layer. We investigate the appropriate positions of the GST film within the dielectric layer for high diffraction efficiency, and we prove that they are antinodes of Fabry-Perot resonance inside the dielectric layer. Using the proposed scheme, we can increase the diffraction efficiency by about ten times compared to a bare GST film pixel, and 80 times for the first-to-zeroth-order diffraction power ratio. We show that the proposed scheme can be designed alternatively for a broadband or wavelength-selective type by tuning the dielectric thickness, and we discuss a multi-phase example with a double-stack structure.

• Structural Engineering and Mechanics
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• 제50권2호
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• pp.181-199
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• 2014

Locking phenomenon is a mesh problem and can be staved off with mesh refinement. If the studier is not preferred going to the solution with increasing mesh size or the computer memory can stack over flow than using higher order plate finite element or using integration techniques is a solution for this problem. The purpose of this paper is to show the shear locking phenomenon can be avoided by increase low order finite element mesh size of the plates and to study shear locking-free analysis of thick plates using Mindlin's theory by using higher order displacement shape function and to determine the effects of various parameters such as the thickness/span ratio, mesh size on the linear responses of thick plates subjected to uniformly distributed loads. A computer program using finite element method is coded in C++ to analyze the plates clamped or simply supported along all four edges. In the analysis, 4-, 8- and 17-noded quadrilateral finite elements are used. It is concluded that 17-noded finite element converges to exact results much faster than 8-noded finite element, and that it is better to use 17-noded finite element for shear-locking free analysis of plates.

• Coupled systems mechanics
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• 제2권1호
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• pp.53-83
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• 2013

Sea waves induce significant pressures on coastal surfaces, especially on rocky vertical cliffs or breakwater structures (Peregrine 2003). In the present work, this hydrodynamic pressure is considered as the excitation acting on a piezoelectric material sheet, installed on a vertical cliff, and connected to an external electric circuit (on land). The whole hydro/piezo/electric system is modeled in the context of linear wave theory. The piezoelectric elements are assumed to be small plates, possibly of stack configuration, under a specific wiring. They are connected with an external circuit, modeled by a complex impedance, as usually happens in preliminary studies (Liang and Liao 2011). The piezoelectric elements are subjected to thickness-mode vibrations under the influence of incident harmonic water waves. Full, kinematic and dynamic, coupling is implemented along the water-solid interface, using propagation and evanescent modes (Athanassoulis and Belibassakis 1999). For most energetically interesting conditions the long-wave theory is valid, making the effect of evanescent modes negligible, and permitting us to calculate a closed-form solution for the efficiency of the energy harvesting system. It is found that the efficiency is dependent on two dimensionless hydro/piezo/electric parameters, and may become significant (as high as 30 - 50%) for appropriate combinations of parameter values, which, however, corresponds to exotically flexible piezoelectric materials. The existence or the possibility of constructing such kind of materials formulates a question to material scientists.

• 설비공학논문집
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• 제28권4호
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• pp.153-157
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• 2016

In case of metal insulation, which is produced by stacking stainless steel sheets and air layers in a multi-stack manner at a specific thickness, insulation performance will be evaluated based on thermal transmittance rather than the intrinsic physical properties of each material such as thermal conductivity. However, there is no standard for measuring thermal transmittance targeted for non-homogeneous insulation which is used in relatively high temperature conditions such as a power station. In this study, the thermal conductivity of homogeneous insulation acquired by the standardized guard hot plate method and the thermal conductivity of homogeneous insulation measured by the newly developed performance tester were compared to verify the confidence level of the tester. As a result, thermal conductivity acquired by the newly developed thermal transmittance tester was about 6% higher than the thermal conductivity measured by the existing guard hot plate method under the anticipated service temperature conditions.

• Current Optics and Photonics
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• 제3권6호
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• pp.571-576
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• 2019

The morphological changes of anthracnose (fungus) -infected tomato seeds have been studied to identify the infection and characterize its effect. Full-field optical coherence tomography (FF-OCT) has been utilized as a nondestructive but efficient modality for visualizing the effects of fungal infection. The cross-sectional images extracted from a stack of en face FF-OCT images showed significant changes with infection in the seed structure. First of all, the seed coat disappeared with the infection. The thickness of the seed coat of a healthy seed was measured as 28.2 ㎛, with a standard deviation of 1.2 ㎛. However, for infected seeds the gap between surface and endosperm was not appreciably observed. In addition, the measurements confirmed that the dryness of seeds did not affect the internal seed structure. The reconstructed three-dimensional (3D) image revealed that the permeability of the seed coat, which plays the vital role of protecting the seed, is also affected by the infection. These results suggest that FF-OCT has good potential for the identification of fungus-infected tomato seeds, and for many other tasks in agriculture.

• 한국항공우주학회지
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• 제36권7호
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• pp.642-650
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• 2008

고분자 전해질 연료전지 스택의 성능향상과 안전성 확보를 위하여 스택의 체결하중으로 인한 가스켓과 GDL의 구조적 거동을 살펴보았다. 가스켓 구조 해석의 경우 하중과 변위의 초탄성 거동을 표현하기 위하여 Mooney-Rivlin의 변형률에너지 함수를 사용하였으며, 재료물성을 구하기 위하여 단축 인장 및 등가 이축 인장 시험을 수행하였고 유한요소 해석과 비교하였다. GDL의 물성측정을 위하여 압축 하중의 변화에 따라 두께변화를 측정하였고 단위 셀을 제작하여 하중의 변화에 따른 채널의 압력차를 측정하였다. 실험 데이터를 바탕으로 채널 단면적의 변화를 계산, 유한요소 해석결과와 비교하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.272-272
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• 2014

SnO thin films, 100 nm in thickness, were deposited on glass substrates by RF magnetron sputtering. A stack structure of $SnO_2/SnO$, where few nanometers of $SnO_2$ were determined on the SnO thin film by X-ray photoelectron spectroscopy. In addition, XPS depth profile analysis of the pristine and heat treated thin films were introduced. The electrical behavior of the as-sputtered films during the annealing was recorded to investigate the working conditions for the SnO sensor. Subsequently, The NH3 sensing properties of the SnO sensor at operating temperature of $50-200^{\circ}C$ were examined, in which the p-type semiconducting sensing properties of the thin film were noted. The sensor shows good sensitivity and repeatability to $NH_3$ vapor. The sensor properties toward several gases like $H_2S$, $CH_4$ and $C_3H_8$ were also introduced. Finally, a sensing mechanism was proposed and discussed.

• 한국표면공학회지
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• 제40권3호
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• pp.149-158
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• 2007

Of all components of MCFC(molten carbonate fuel cell), corrosion of separator is one of the most decisive factor for commercializing of MCFC. In order to provide better understanding of corrosion behavior and morphology for gas channel of separator plate, post-analysis after cell operation for 1200 hours at $650^{\circ}C$ was performed by optical microscope, SEM and EPMA. Intergranular corrosion was observed on gas channel of separator plate. Corrosion product layer was identified as Fe-oxide, Cr-oxide and Ni-oxide by EPMA, and oxide thickness was measured with a $60{\mu}m-150{\mu}m$. Also, gas channel of separator was damaged by severe intergrannular attack with post analysis in consistent with immersion test. Moreover, pitting on the channel plate was observed with a depth of $18{\sim}24{\mu}m$. The results of immersion method are well agreement with post analysis measurements.

• 한국전기전자재료학회논문지
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• 제13권10호
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• pp.822-827
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• 2000

The Si-SiO$_2$interface trap and nitride bulk trap distribution of SONOSFET(polysilicon-oxide-nitride-oxide-semiconductor field effect transistor) NVSM (nonvolatile semiconductor memory) cell is investigated by single junction charge pumping method. The device was fabricated by 0.35㎛ standard logic fabrication process including the ONO stack dielectrics. The thickness of ONO dielectricis are 24$\AA$ for tunnel oxide, 74 $\AA$ for nitride and 25 $\AA$ for blocking oxide, respectively. By the use of single junction charge pumping method, the lateral profiles of both interface and memory traps can be calculated directly from experimental charge pumping results without complex numerical simulation. The interface traps were almost uniformly distributed over the whole channel region and its maximum value was 7.97$\times$10$\^$10/㎠. The memory traps were uniformly distributed in the nitride layer and its maximum value was 1.04$\times$10$\^$19/㎤. The degradation characteristics of SONOSFET with write/erase cycling also were investigated.

• 한국전기전자재료학회논문지
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• 제20권12호
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• pp.1017-1021
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• 2007

To implement tera bit level non-volatile memories of low power and fast operation, proving statistical reproductivity and satisfying reliabilities at the nano-scale are a key challenge. We fabricate the charge trapping nano scaled SONOS unit memories and 64 bit flash arrays and evaluate reliability and performance of them. In case of the dielectric stack thickness of 4.5 /9.3 /6.5 nm with the channel width and length of 34 nm and 31nm respectively, the device has about 3.5 V threshold voltage shift with write voltage of $10\;{\mu}s$, 15 V and erase voltage of 10 ms, -15 V. And retention and endurance characteristics are above 10 years and $10^5$ cycle, respectively. The device with LDD(Lightly Doped Drain) process shows reduction of short channel effect and GIDL(Gate Induced Drain Leakage) current. Moreover we investigate three different types of flash memory arrays.