• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.279-280
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• 2009

Organic field-effect transistors (OFETs) are of interest for use in widely area electronic applications. We fabricated a copper phthalocyanine (CuPc) based field-effect transistor with different metal electrode. The CuPc FET device was made a top-contact type and the substrate temperature was room temperature. The source and drain electrodes were used an Au and Al materials. The CuPc thickness was 40nm, and the channel length was $50{\mu}m$, channel width was 3mm. We observed a typical current-voltage (I-V) characteristics in CuPc FET with different electrode materials.

• Journal of Information Display
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• v.13 no.1
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• pp.51-54
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• 2012

In this study, the bias-temperature stress and current-temperature stress induced by the electrical stabilities of half-Corbino hydrogenated-amorphous-silicon (a-Si:H) thin-film transistors (TFTs) with different gate electrode geometries fabricated on the same substrate were examined. The influence of the gate pattern on the threshold voltage shift of the half-Corbino a-Si:H TFTs is discussed in this paper. The results indicate that the half-Corbino a-Si:H TFT with a patterned gate electrode has enhanced power efficiency and improved aperture ratio when compared with the half-Corbino a-Si:H TFT with an unpatterned gate electrode and the same source/drain electrode geometry.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.10
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• pp.930-933
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• 2008

Organic field-effect transistors (OFETs) are of interest for use in widely area electronic applications. We fabricated a copper phthalocyanine (CuPc) based field-effect transistor with different metal electrode. The CuPc FET device was made a top-contact type and the substrate temperature was room temperature. The source and drain electrodes were used an Au and Al materials. The CuPc thickness was 40 nm, and the channel length was $50{\mu}m$, channel width was 3 mm. We observed a typical current-voltage (I-V) characteristics in CuPc FET with different electrode materials.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.410-411
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• 2008

Organic field-effect transistors (OFETs) are of interest for use in widely area electronic applications. We fabricated a copper phthalocyanine (CuPc) based field-effect transistor with different metal electrode. The CuPc FET device was made a top-contact type and the substrate temperature was room temperature. The source and drain electrodes were used an Au and Al materials. The CuPc thickness was 40nm, and the channel length was $50{\mu}m$, channel width was 3mm. We observed a typical current-voltage (I-V) characteristics in CuPc FET with different electrode materials.

• Advances in nano research
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• v.3 no.1
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• pp.49-54
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• 2015

The structure represents symmetrical metal electrode (gate 1) - front $SiO_2$ layer - n-Si nanowire FET - buried $SiO_2$ layer - metal electrode (gate 2). At the symmetrical gate voltages high conductive regions near the gate 1 - front $SiO_2$ and gate 2 - buried $SiO_2$ interfaces correspondingly, and low conductive region in the central region of the NW are formed. Possibilities of applications of nanosize FETs at the deep inversion and depletion as a distributed capacitance are demonstrated. Capacity density is an order to ${\sim}{\mu}F/cm^2$. The charge density, it distribution and capacity value in the nanowire can be controlled by a small changes in the gate voltages. at the non-symmetrical gate voltages high conductive regions will move to corresponding interfaces and low conductive region will modulate non-symmetrically. In this case source-drain current of the FET will redistributed and change current way. This gives opportunity to investigate surface and bulk transport processes in the nanosize inversion channel.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.5
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• pp.399-402
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• 2007

The effects of heat treatment on the electrical properties of strained-Si/SiGe-on-insulator (SGOI) devices were examined. We proposed the optimized heat treatment processes for improving the back interfacial electrical properties in SGOI-MOSFET. By applying the additional pre-RTA (rapid thermal annealing) before gate oxidation step and the post-RTA after source/drain dopant activation step, the electrical properties of strained-Si channel on $Si_{1-x}Ge_x$ layer were greatly improved, which resulting the improvement of the driving current, transconductance, and leakage current of SGOI-MOSFET.

• Journal of information and communication convergence engineering
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• v.13 no.4
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• pp.257-263
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• 2015

In this study, organic field-effect transistors (OFETs) using a copper phthalocyanine (CuPc) material as an active layer and SiO₂ as a gate insulator were fabricated with varying active layer thicknesses and channel lengths. Further, using a thermal evaporation method in a high-vacuum system, we fabricated a CuPc FET device of the top-contact type and used Au materials for the source and drain electrodes. In order to discuss the channel formation and FET characteristics, we observed the typical current-voltage characteristics and calculated the threshold voltage of the CuPc FET device. We also found that the capacitance reached approximately 97 pF at a negative applied voltage and increased upon the accumulation of carriers at the interface of the metal and the CuPc material. We observed the typical behavior of a FET when used as an n-channel FET. Moreover, we calculated the threshold voltage to be about 15-20 V at V_DS = -80 V.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.619-621
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• 2008

Organic field-effect transistors (OFETs) are of interest for use in widely area electronic applications. We fabricated a copper phthalocyanine (CuPc) based field-effect transistor with different metal electrode. The CuPc FET device was made a top-contact type and the substrate temperature was room temperature. The source and drain electrodes were used an Au and Al materials. The CuPc thickness was 40nm, and the channel length was $50{\mu}m$, channel width was 3mm. We observed a typical current-voltage (I-V) characteristics in CuPc FET with different electrode materials.

• Proceeding of EDISON Challenge
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• 2017.03a
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• pp.428-432
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• 2017

Silicon 기반 Metal-oxide-semiconductor field-effect transistor (MOSFET)의 크기가 감소함에 따라 silicon자체의 물성적 한계가 나타나고 있다. 이를 극복하고자 III-V 화합물 반도체가 채널소자로서 각광받고 있다. 본 연구에서는 III-V 화합물반도체 중 $In_xGa_{1-x}As$는 Indium 조성에 따른 전자구조 및 n-type MOSFET의 소자 특성을 본다. Indium의 조성이 증가함에 따라 subband의 개수와 간격이 증가하게 되어 Density of state가 감소하게 된다. 이로 인하여 Indium의 조성이 증가함에 따라 $In_xGa_{1-x}As$ 채널 MOSFET에서 상대적으로 Fermi level을 더 많이 상승시키게 되어 potential barrier를 얇아지게 만들며 또한 에너지에 따른 전류 밀도를 넓게 분포하도록 만든다. 이로 인하여 단채널에서는 In 조성이 증가함에 따라 direct source-to-drain tunnelling current이 증가하게 된다. 이로 인하여 In 조성의 증가에 따라 subthreshold swing과 ON-state current가 저하된다.

• Proceedings of the KIEE Conference
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• 1997.07d
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• pp.1630-1632
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• 1997

We have investigated activation phenomena of implanted ions on silicon wafers using microwave(2.45GHz). It is found that the higher concentration of impurities makes the better activation effects by microwave annealing. We have exposed poly-Si TFTs by microwave in order to anneal and improved the device performance. Microwave activates source/drain ions and lowers the contact resistance so that the current of the poly-Si TFTs increases. In addition, the leakage current of hydrogen passivated poly-Si TFTs is decreased after microwave annealing, due to the diffusion of hydrogen ions and curing the defects in the poly-Si active channel.