• 한국전기전자재료학회논문지
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• 제18권1호
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• pp.6-11
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• 2005

In this paper, two types of vertical SIT(Static Induction Transistor) structures are proposed to improve their electrical characteristics including the blocking voltage. Besides, the two dimensional numerical simulations were carried out using ISE-TCAD to verify the validity of the device and examine the electrical characteristics. First, a trench gate region oxide power SIT device is proposed to improve forward blocking characteristics. Second, a trench gate-source region power SIT device is proposed to obtain more higher forward blocking voltage and forward blocking characteristics at the same size. The two proposed devices have superior electrical characteristics when compared to conventional device. In the proposed trench gate oxide power SIT, the forward blocking voltage is considerably improved by using the vertical trench oxide and the forward blocking voltage is 1.5 times better than that of the conventional vertical power SIT. In the proposed trench gate-source oxide power SIT, it has considerable improvement in forward blocking characteristics which shows 1500V forward blocking voltage at -10V of the gate voltage. Consequently, the proposed trench oxide power SIT has the superior stability and electrical characteristics than the conventional power SIT.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.196-197
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• 2006

In this paper, two types of vertical SIT(Static Induction Transistor) structures are proposed to improve their electrical characteristics including the blocking voltage. Besides, the two dimensional numerical simulations were carried out using ISE-TCAD to verify the validity of the device and examine the electrical characteristics. First, a trench gate region oxide power SIT device is proposed to improve forward blocking characteristics. Second, a trench gate-source region power SIT device is proposed to obtain more higher forward blocking voltage and forward blocking characteristics at the same size. The two proposed devices have superior electrical characteristics when compared to conventional device. In the proposed trench gate oxide power SIT, the forward blocking voltage is considerably improved by using the vertical trench oxide and the forward blocking voltage is 1.5 times better than that of the conventional vertical power SIT. In the proposed trench gate-source oxide power SIT, it has considerable improvement in forward blocking characteristics which shows 1500V forward blocking voltage at -10V of the gate voltage. Consequently, the proposed trench oxide power SIT has the superior stability and electrical characteristics than the conventional power SIT.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 추계학술대회 논문집
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• pp.97-101
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• 2001

Recently, as the development of industry, the nonlinear load becomes increased. Because of nonlinear load, the variation of source voltage is generated by the impedace of source side flowed harmonic currents. For blocking harmonic currents by nonlinear load, a series active power filter operates blocking resistance of harmonic currents. The value of blocking resistance shows ideal compensating characteristic out of theoretically infinite value. But the blocking resistance is limited by the problem of the system stability and the capacity of inverter. In this paper, the value of optimum blocking resistance is found by a simulation in the applied system. In the case of unbalanced source voltages, each relation of the blocking resistance is shown. It is proved that blocking resistance of series active power filter relates to a passive filter.

• 정보보호학회논문지
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• 제19권5호
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• pp.195-200
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• 2009

CRT-RSA 알고리즘이 스마트카드나 마이크로컨트롤러 등의 암호 장치에 구현된 경우 레이저 주입, 전자파 방사, 이온 빔 주사, 전압 글리치 주입 등의 오류 주입 기술 등에 의해 CRT-RSA 알고리즘의 비밀 소인수 p, q가 쉽게 노출 될 수 있다. 그 중 전압 글리치 오류는 대상 암호 장치에 어떠한 조작이나 변형 없이 적용 가능하여 보다 실제적이다. 본 논문에서는 비정상 전원 전압을 이용한 오류 주입 공격을 실험하였다. 실험 결과 기존에 알려진 고전압 글리치를 주입하는 방법 외에도 전원 전압을 일정 시간동안 단절함으로써 CRT-RSA의 비밀 소인수 p, q를 알아낼 수 있었다.

• 한국위성정보통신학회논문지
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• 제11권4호
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• pp.21-26
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• 2016

PPS 소자가 삽입된 N형 실리콘 제어 정류기(NSCR_PPS) 소자에서 채널차단영역의 이온주입 변화가 정전기 보호 성능에 미치는 영향을 연구하였다. 종래의 NSCR 표준소자는 on 저항, 스냅백 홀딩 전압 및 열적 브레이크다운 전압이 너무 낮아 마이크로칩의 정전기보호소자로 적용이 어려웠다. 그러나 본 연구에서 제안하는 채널 차단 영역의 이온주입 조건을 변화시켜 각각 변형설계된 소자에서는 채널 차단 이온주입이 정전기 보호성능의 향상에 영향을 주는 중요한 파라미터였으며, CPS_PDr+HNF 구조의 변형소자는 정전기보호소자의 설계창을 만족시키는 향상된 정전기보호성능을 나타내어 고전압 동작용 마이크로 칩의 정전기보호 소자로 적용 가능함을 확인하였다.

• Journal of Electrical Engineering and information Science
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• 제1권2호
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• pp.109-118
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• 1996

This paper deals with a new multi-level high voltage source inverter with GTO Thyristors. Recently, a multi-level approach seems to be the best suited for implementing high voltage conversion systems because it leads to harmonic reduction and deals with safe high power conversion systems independent of the dynamic switching characteristics of each power semiconductor device. A conventional multi-level inverter has some problems; voltage unbalance between DC-link capacitors and larger blocking voltage across the inner switching devices. To solve these problems, the novel multi-level inverter structure is proposed.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.199-199
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• 2008

이 실험은 NVM의 Oxide, Nitride, Oxide nitride층별 blocking, trapping and tunneling 속성에 대해서 밝히고자 한다. gate 전극은 값싸고 전도도가 좋은 알루미늄을 사용한다. 유리기판위에 Silicon nitride층을 20nm로 코팅하고 Silicon dioxide층을 10nm로 코팅한다. 그리고 amorphous Silicon material이 증착된다. Poly Silicon은 Solid Phase Crystallization 방법을 사용하였다. 마지막 공정으로 p-doping은 ion shower에 의한 방법으로 drain과 source 전극을 생성하였다. gate가 biasing 될 때, p-channel은 source와 drain 사이에서 형성된다. Oxide Nitride Oxide nitride (ONO) 층은 각각 12.5nm/20nm/2.3nm의 두께로 만들었다. 전하는 Program process 중에 poly Silicon층에서 Silicon Oxide nitride tunneling층을 통하여 움직이게 된다. 그리고 전하들은 Silicon Nitride층에 머무르게 된다. 그 전하들은 erasing process 중에 trapping 층에서 poly Silicon 층으로 되돌아 간다. Silicon Oxide blocking층은 trapping층으로 전하가 나가는 것을 피하기 위하여 더해진다. 이 논문에서 Programming process와 erasing process의 Id-Vg 특성곡선을 설명한다. Programming process에 positive voltage를 또는 erasing process에 negative voltage를 적용할 때, Id-Vg 특성 곡선은 왼쪽 또는 오른쪽으로 이동한다. 이 실험이 보여준 결과값에 의해서 10년 이상의 저장능력이 있는 메모리를 만들 수 있다. 그러므로, NVM의 중요한 두 가지 성질은 유지성과 내구성이다.

• Transactions on Electrical and Electronic Materials
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• 제6권3호
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• pp.115-118
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• 2005

Organic photovoltaic properties were studied in $CuPc/C_{60}$ and $ZnPc/C_{60}$ heterojunction structure by varying the organic layer thicknesses. Current density-voltage characteristics of organic photovoltaic cells were measured using Keithley 236 source-measure unit and a 500 W xenon lamp (ORIEL 66021) for a light source. From the analyses of current-voltage characteristics such as short-circuit current density, open-circuit voltage and power conversion efficiency, optimum thickness of the organic layer were obtained.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제54권9호
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• pp.437-443
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• 2005

This paper deals with an experimental study for Klippon reiay in Cheju-Heanam HVDC system Klippon relay was troubled many times for years, and Klippon relay's fault caused the HVDC system trip. So for several years, these reasons of Klippon relay fault were investigated. The malfunction of Klippon relay in Cheju-Haenam HVDC system has been caused by the incoming of random surge(current source and voltage source). This paper has stu야ed the theoretic리 analysis and experimental study of Klippon relay, and the solutions against the problems were suggested according to their causes. Among the problems, grounding problem was removed by one-point earth connection and by modification of grounding circuit. The effects of inrush current was removed by inserting the blocking diodes by series in Klippon relay circuits. Finally, The over-voltage induced on Klippon relay, by a relay excitation coil, was removed by inserting a free-wheeling diode in Parallel with the excitation coil.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.598-602
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• 2002

This paper presents the 3-phase hybrid series active power filter with dynamic voltage restorer(DVR) which serve as an energy buffer and current harmonics blocking resistor connected to sensitive loads, such as, to compensate voltage dips and current harmonics in power distribution system. The DVR is to inject a dynamically controlled voltage generated by a forced commutated converter in series to the bus voltage by means of a booster transformer. The momentary amplitudes of the three injected phase voltages are controlled such as to eliminate any detrimental effects of a bus fault to the load voltage. The proposed system is able to simultaneously compensate current harmonics, voltage fluctuating and voltage unbalance in power distribution systems. The reference phase angle detected by synchronized with the positive sequence component of the unbalanced source by using symmetrical component transformation. The effectiveness of proposed system is verified by the computer simulation.