• Journal of Information Processing Systems
• /
• v.6 no.4
• /
• pp.537-552
• /
• 2010

Software Debugging is the most time consuming and costly process in the software development process. Many techniques have been proposed to isolate different faults in a program thereby creating separate sets of failing program statements. Debugging in parallel is a technique which proposes distribution of a single faulty program segment into many fault focused program slices to be debugged simultaneously by multiple debuggers. In this paper we propose a new technique called Faulty Slice Distribution (FSD) to make parallel debugging more efficient by measuring the time and labor associated with a slice. Using this measure we then distribute these faulty slices evenly among debuggers. For this we propose an algorithm that estimates an optimized group of faulty slices using as a parameter the priority assigned to each slice as computed by value of their complexity. This helps in the efficient merging of two or more slices for distribution among debuggers so that debugging can be performed in parallel. To validate the effectiveness of this proposed technique we explain the process using example.

• The Transactions of the Korea Information Processing Society
• /
• v.7 no.4
• /
• pp.1103-1111
• /
• 2000

The hyper-geometric distribution software reliability growth model (HGDM) usually assumes that all the software faults detected are perfectly removed without introducing new faults. However, since new faults can be introduced during the test-and-debug phase, the perfect debugging assumption should be relaxed. In this context, Hou, Kuo and Chang [7] developed a modified HGDM for imperfect debugging environment, assuming tat the learning factor is constant. In this paper we extend the existing imperfect debugging HGDM for tow respects: introduction of random sensitivity factor and allowance of variable learning factor. Then the statistical characteristics of he suggested model are studied and its applications to two real data sets are demonstrated.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.1
• /
• pp.24-38
• /
• 2009

In this paper, we implement processor debugger based on OCD(On-Chip Debugger). Implemented debugger consist of software debugger that supports a functionality of symbolic debugging, OCD integrated into target processor as a function of debugging, and Interface & Control block which interfaces software debugger and OCD at high speed rates. The debugger supports c/assembly level debugging using software debugger as OCD is integrated into target processor. After OCD block is interfaced with 32bit RISC processor core and then implemented with FPGA, the verification of On-Chip Debugging System is carried out through connecting OCD and Interface & Control block, and SW debugger.

• Journal of the Korea Society for Simulation
• /
• v.15 no.4
• /
• pp.51-58
• /
• 2006

Debugging embedded softwares is very different from debugging general softwares. For examples, debugging embedded software requires more information, such as information on power consumption, information on the distribution of executed instructions, information on the distribution of used registers, and information on the amount of clocks consumed during the execution of a program, that is not needed in debugging general softwares. In this paper, we propose more effective method fer debugging embedded softwares using an instruction set simulator for the microprocessor that is executing embedded softwares. In this research, we develop a debugger based on an instruction set simulator for a domestic embedded microprocessor called SE1608 and we shows an effective debugging method using a MiBench program which is widely used to benchmark embedded softwares. The debugging method proposed in this paper is relatively easy to implement and shows many advantages compared with existing debugging methods.

• Journal of Information Technology Applications and Management
• /
• v.11 no.4
• /
• pp.87-94
• /
• 2004

The software reliability growth model(SRGM) has been developed in order to estimate such reliability measures as remaining fault number, failure rate and reliability for the developing stage software. Almost of them assumed that the faults detected during testing were evetually removed. Namely, they have studied SRGM based on the assumption that the faults detected during testing were perfectly removed. The fault removing efficiency. however. IS imperfect and it is widely known as so in general. It is very difficult to remove detected fault perfectly because the fault detecting is not easy and new error may be introduced during debugging and correcting. Therefore, the fault detecting efficiency may influence the SRGM or cost of developing software. It is a very useful measure for the developing software. much helpful for the developer to evaluate the debugging efficiency, and, moreover, help to additional workloads necessary. Therefore. it is very important to evaluate the effect of imperfect dubugging in point of SRGM and cost. and may influence the optimal release time and operational budget. I extent and study the generally used reliability and cost models to the imperfect debugging range in this paper.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.30 no.11A
• /
• pp.987-994
• /
• 2005

Most of the proposed SRGMs are required to perfect debugging based on removal of defect as soon as the detection of defects in system tests. But the detected defects are corrected after few days as a fixed time or induced new fault in software under the imperfect debugging environments. Solving these problems, we discussed that the formal software reliability model considered testing-effort for the fault detection and correction of software defects, and then using this model we have estimated of the software reliability closed to practical conditions.

• Journal of information and communication convergence engineering
• /
• v.3 no.2
• /
• pp.96-100
• /
• 2005

Since ubiquitous embedded software is sensitive to the resources and environment of target system, it should be debugged in the same environment as actual target system. However, existing tools to debug embedded software, in which access to internal signal or resources is limited, are uneconomical. In the thesis, economical and practical USB-JTAG Adapter that can use open GDB is suggested. It can remove existing limitations of environment implementation that have many difficulties in implementing an environment for remote debugging. Hence, the thesis provides economical interfacing environment that can debug ubiquitous embedded software inside remote system.

• Journal of Korean Society for Quality Management
• /
• v.34 no.4
• /
• pp.133-138
• /
• 2006

In this paper, we propose a software reliability growth model (SRGM) based on the testing domain, which is isolated by the executed test cases. This model assumes an imperfect debugging environment in which new faults are introduced in the fault-correction process. We consider that the fault detection rate of NHPP model is changed in the proposed SRGM. We obtain the maximum likelihood estimate, and compare goodness-of-fit with another existing software reliability growth model.

• Journal of Internet Computing and Services
• /
• v.17 no.5
• /
• pp.33-42
• /
• 2016

Pin is a framework that creates dynamic program analysis tools and can be used to perform program analysis on user space in Linux and Windows. It is hard to analyze the program such as Anti-reversing program or malware using anti-debugging by Pin. In this paper, we will suggest the implementation of scheme bypassing anti-debugging with Pin. Each pin code is written to bypass anti-debugging detecting Pin. And Pin creates a pin tool combined with Pin codes that bypass anti-debugging methods. The pin tool are tested with files created by anti-debugging protector. The technique in the paper is expected to be a reference of code bypassing anti-debugging and be applied to bypass newly discovered anti-debugging through code modification in the future.

• The Korean Journal of Applied Statistics
• /
• v.21 no.6
• /
• pp.997-1006
• /
• 2008

This paper proposes a new model by combining an infinite-server queueing model for multi-task processing software system with a perfect debugging model based on Markov process with two types of faults suggested by Lee et al. (2001). We apply this model for module and integration testing in the testing process. Also, we compute several measure, such as the expected number of tasks whose processes can be completed and the task completion probability are investigated under the proposed model.