• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.10
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• pp.47-55
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• 2015

To verify the function of vehicle is becoming more and more difficult because many electronic control units have been embedded in vehicle with development of electronics industry. The reliability of vehicle should be considered above all important because malfunction of vehicle can cause damage of human life. In this paper, defect diagnosis platform based on CAN network is proposed to improve the reliability of vehicle. Reliability of vehicle is significantly increased by adopting the structural test via dedicated test path after manufacturing. Besides, the test cost is reduced because additional test pins are not required.

• It's Smart Media
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• v.3 no.3
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• pp.24-31
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• 2014

• The Magazine of the IEIE
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• v.30 no.9
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• pp.36-36
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• 2003

• Smart Media Journal
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• v.1 no.1
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• pp.1-9
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• 2012

This Paper proposes an effective SoC hardware architecture implementing a VDP for Full HD TVs. The proposed architecture makes real time video processing possible with supporting efficient bus architecture and flexible interface. Video IP cores in the VDP are designed to provide a high quality of improved image enhancement function. The Avalon interface is adopted to guarantee real-time capability to IPs as well as SoC integration. This leads to reduced design time and also enhanced designer's convenience due to the easiness in IP addition, deletion, and revision for IP verification and SoC integration. The embedded software makes it possible to implement flexible real-time system by controlling setting parameter details and data transmitting schemes in real-time. The proposed VDP SoC design is implemented on Cyclon III SoPC platform. The experimental results show that our proposed architecture of the VDP SoC successfully provides required quality of Video image by converting SD level input to Full HD level image.

• Journal of Intelligence and Information Systems
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• v.15 no.3
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• pp.17-29
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• 2009

C programming is a main programming for the Educational Robot Arm which is based on AVR ATmega128. The development environment is not integrated, so it is complex and difficult to study for middle or high school students who want to learn programming and control the educational robot arm. Furthermore, there is no debug and testing environment support. This paper presents a Java-based development platform for the educational robot arm. This platform includes: an up-to-date tiny Java Virtual Machine (NanoVM) for the educational robot arm; An Eclipse based Java integrated development environment as an Eclipse plug-in; a 3D simulator on the PCs to support testing and debugging programs without real robots. The Java programming environment makes development for educational robot arm easier for students.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.93-100
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• 2008

In this paper, we address a novel simulated annealing(SA)-based test scheduling method for testing network-on-chip (NoC)-based systems-on-chip(SoCs), on the assumption that the test platform proposed in [1] is installed. The proposed method efficiently mixed the rectangle packing method with SA and improved the scheduling results by locally changing the test access mechanism(TAM) widths for cores and the testing orders. Experimental results using ITC'02 benchmark circuits show that the proposed algorithm can efficiently reduce the overall test time.

• Electronics and Telecommunications Trends
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• v.28 no.5
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• pp.145-155
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• 2013

현대인의 집밖 스마트 ICT 디바이스의 요구성능은 휴대 용이성, 끊김 없는 통신채널 확보, 저전력 소모, 편리한 UI, 다양한 기능의 통합제공, 필요한 기능의 손쉬운 추가 및 삭제 등이며, 이런 요구에 충족하기 위해서 HW는 경박단소, 고성능 및 저전력 소모 등으로, SW는 개방형 앱 스토어를 통한 기능추가로 진화하였고, 이를 포함하는 디바이스로는 스마트폰, 테블릿 PC가 대표적이다. 집안의 스마트 ICT 디바이스의 요구성능은 집밖 ICT 디바이스 성능을 포함하면서, 어떤 디바이스에서든 끊김없는 콘텐츠 및 데이터 수집과 이동성, 그리고 아직 정의되지 않은 미래 추가기능의 실행 가능성 등이며 이를 위해 STB(Set Top Box), IPTV, 미디어허브, SmarTV 등 다양한 디바이스가 혁신적인 변모를 준비하고 있다. 본고에서는 집안 ICT 디바이스 혁신의 결과물을 디지털 미디어 허브라 명명하고, 이를 지향하고 있는 후보군 디바이스 들의 동향을 살펴보며, 디지털 미디어 허브로의 신속한 변모를 위해 필요한 연구 개발 방안으로 플랫폼기반의 SW-SoC(System On a Chip) 개발 기술을 소개하고자 한다.

• Journal of Digital Contents Society
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• v.15 no.2
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• pp.197-207
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• 2014

Many people are now enjoying mobile games using various smartphone platforms. However, we have to develop games separately for each smart device platforms so far. Cocos2d-x, a game development framework is released to solve this problem. As a multiplatform version of the existing Cocos2d, Cocos2d-x can make one source code run on various platforms. It is an open software that is able to be used by everyone, and when using it, mobile games can be developed easily based on C++ and OpenGL. In this paper, we implemented a PC laboratory decorating game application, named ILove501, using Cocos2d-x. The 501 is a room number of our PC lab. ILove501 includes an educational feature of solving quizzes in order to highlight positive effects of game. For implementation of a multiplatform game, ILove501 was developed in Windows and iOS environment at the same time, and we verified the results of the execution by porting on a variety of devices such as Android, iPhone, iPad and Galaxy Tab.

• The KIPS Transactions:PartD
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• v.13D no.5 s.108
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• pp.731-740
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• 2006

WIPI is developed by KWISF(Korea Wireless Internet Standardization Forum) and a wireless internet standard platform adopted by TTA. It needs the certification Process for standard specification in order to confirm interoperability. The WIPI is composed of the HAL, the Runtime Engine, and APIs(WIPI-C, WIPI-Java). nl applications are implemented through WIPI APIs that can be finished by themselves or provided essential functions from runtime engine or HAL. Therefore it needs to certify where the problems occur when errors occurred in a application. In this paper we propose the PCT that certifies a WIPI platform's functionality and APIs and the HCT that certifies HAL APIs. Because the PCT reports the final certification results for the platform it is impossible to know where the problems occur when it fails to certify platform. So, it needs to certify the HAL regardless of platform certification.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.6C
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• pp.498-504
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• 2008

In this paper, an efficient hardware platform for the digital signal processing for OFDM Communication systems is presented. The hardware platform consists of a single FPGA, two DSPs with 8000 MIPS of maximum at 1 GHz clock, 2-channel ADC and DAC supporting maximum 125 MHz sampling rate, and flexible data bus architecture, so that a wide variety of baseband signal processing algorithms for practical OFDM communication systems may be implemented and tested. The IEEE 802.16 software modem is also presented in order to verify the effectiveness and usefulness of the designed platform.