• Korean Journal of Materials Research
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• v.5 no.7
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• pp.794-801
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• 1995

To connect the driver IC and Al coated glass, a method has been developed to plate electrolessly Ni on Al/PR system. It Is necessary to pretreat Al to remove oxide film before plating. In order to find pretreatment process which does not damage photoresist or glass, alkaline and fluoride zincate process have been investigated. Because photoresist and aluminum thin film can easily dissolve in alkaline solution, it is considered that the fluoride zincate process was a suitable one. After immersion in the zincate solution containing 1.5 g/$\ell$ ammonium bifluoride and 100 g/$\ell$ zinc sulfate, electroless nickel plating could be performed. The additive in the zincate solution and thiourea in the plating solution increased smoothness of the plated surface. Acld dip could improve the uniformit of the surface.

• Journal of Sensor Science and Technology
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• v.27 no.5
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• pp.300-305
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• 2018

The uncooled microbolometer thermal sensor for low cost and mass volume was designed to target the new infrared market that includes smart device, automotive, energy management, and so on. The microbolometer sensor features 80x60 pixels low-resolution format and enables the use of wafer-level vacuum packaging (WLVP) technology. Read-out IC (ROIC) implements infrared signal detection and offset correction for fixed pattern noise (FPN) using an internal digital to analog convertor (DAC) value control function. A reliable WLVP thermal sensor was obtained with the design of lid wafer, the formation of Au80%wtSn20% eutectic solder, outgassing control and wafer to wafer bonding condition. The measurement of thermal conductance enables us to inspect the internal atmosphere condition of WLVP microbolometer sensor. The difference between the measurement value and design one is $3.6{\times}10-9$ [W/K] which indicates that thermal loss is mainly on account of floating legs. The mean time to failure (MTTF) of a WLVP thermal sensor is estimated to be about 10.2 years with a confidence level of 95 %. Reliability tests such as high temperature/low temperature, bump, vibration, etc. were also conducted. Devices were found to work properly after accelerated stress tests. A thermal camera with visible camera was developed. The thermal camera is available for non-contact temperature measurement providing an image that merged the thermal image and the visible image.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.4
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• pp.49-53
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• 2011

High-speed Cu filling into a through-silicon-via (TSV) and simplification of bumping process by electroplating for three dimensional stacking of Si dice were investigated. The TSV was prepared on a Si wafer by deep reactive ion etching, and $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. In order to increase the filling rate of Cu into the via, a periodic-pulse-reverse wave current was applied to the Si chip during electroplating. In the bumping process, Sn-3.5Ag bumping was performed on the Cu plugs without lithography process. After electroplating, the cross sections of the vias and appearance of the bumps were observed by using a field emission scanning electron microscope. As a result, voids in the Cu-plugs were produced by via blocking around via opening and at the middle of the via when the vias were plated for 60 min at -9.66 $mA/cm^2$ and -7.71 $mA/cm^2$, respectively. The Cu plug with a void or a defect led to the production of imperfect Sn-Ag bump which was formed on the Cu-plug.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.1
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• pp.47-54
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• 2021

For the bonding of smaller PCB solder bumps of less than 100 microns, an experiment was performed to make up a tin plating solution and find plating conditions in order to produce a bump pattern through tin electroplating, replacing the previous PCB solder bumps process by microballs. After SR patterning, a Cu seed layer was formed, and then, through DFR patterning, a pattern in which Sn can be selectively plated only within the SR pattern was formed on the PCB substrate. The tin plating solution was made based on methanesulfonic acid, and hydroquinone was used as an antioxidant to prevent oxidation of divalent tin ions. Triton X-100 was used as a surfactant, and gelatin was used as a grain refiner. By measuring the electrochemical polarization curve, the characteristics of organic additives in Triton X-100 and gelatin were compared. It was confirmed that the addition of Triton X-100 suppressed hydrogen generation up to -1 V vs. NHE, whereas gelatin inhibited hydrogen generation up to -0.7 V vs. NHE. As the current density increased, there was a general tendency that the grain size became finer, and it was observed that it became finer when gelatin was added.

• Journal of the Microelectronics and Packaging Society
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• v.16 no.3
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• pp.11-17
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• 2009

The drop impact reliability comes to be important for evaluation of the life time of mobile electronic products such as cellular phone. The drop impact reliability of solder joint is generally affected by the kinds of pad and reflow number, therefore, the reliability evaluation is needed. Drop impact test proposed by JEDEC has been used as a standard method, however, which requires high cost and long time. The drop impact reliability can be indirectly evaluated by using high speed shear test of solder joints. Solder joints formed on 3 kinds of surface finishes OSP (Organic Solderability Preservation), ENIG (Electroless Nickel Immersion Gold) and ENEPIG (Electroless Nickel Electroless Palladium Immersion Gold) was investigated. The shear strength was analysed with the morphology change of intermetallic compound (IMC) layer according to reflow number. The layer thickness of IMC was increased with the increase of reflow number, which resulted in the decrease of the high speed shear strength and impact energy. The order of the high speed shear strength and impact energy was ENEPIG > ENIG > OSP after the 1st reflow, and ENEPIG > OSP > ENIG after 8th reflow.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2012.11a
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• pp.123-123
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• 2012

최근 연구되고 있는 TSV(Through Silicon Via) 기술은 Si 웨이퍼 상에 직접 전기적 연결 통로인 관통홀을 형성하는 방법으로 칩간 연결거리를 최소화 할 수 있으며, 부피의 감소, 연결부 단축에 따른 빠른 신호 전달을 가능하게 한다. 이러한 TSV 기술은 최근의 초경량화와 고집적화로 대표되는 전자제품의 요구를 만족시킬 수 있는 차세대 실장법으로 기대를 모으고 있다. 한편, 납땜 재료의 주 원료인 주석은 주로 반도체 소자의 제조, 반도체 칩과 기판의 접합 및 플립 칩 (Flip Chip) 제조시의 범프 형성 등 반도체용 배선재료에 널리 사용되고 있다. 최근에는 납의 유해성 때문에 대부분의 전자제품은 무연솔더를 이용하여 제조되고 있지만, 주석을 이용한 반도체 소자가 고밀도화, 고 용량화 및 미세피치(Fine Pitch)화 되고 있기 때문에, 반도체 칩의 근방에 배치된 주석으로부터 많은 알파 방사선이 방출되어 메모리 셀의 정보를 유실시키는 소프트 에러 (Soft Error)가 발생되는 위험이 많아지고 있다. 이로 인해, 반도체 소자 및 납땜 재료의 주 원료인 주석의 고순도화가 요구되고 있으며, 특히 알파 방사선의 방출이 낮은 로우알파솔더 (Low Alpha Solder)가 요구되고 있다. 이에 따라 본 연구는 4인치 실리콘 웨이퍼상에 직경 $60{\mu}m$, 깊이 $120{\mu}m$의 비아홀을 형성하고, 비아 홀 내에 기능 박막증착 및 전해도금을 이용하여 전도성 물질인 Cu를 충전한 후 직경 $80{\mu}m$의 로우알파 Sn-1.0Ag-0.5Cu 솔더를 접합 한 후, 접합부 신뢰성 평가를 수행을 위해 고속 전단시험을 실시하였다. 비아 홀 내 미세구조와 범프의 형상 및 전단시험 후 파괴모드의 분석은 FE-SEM (Field Emission Scanning Electron Microscope)을 이용하여 관찰하였다. 연구 결과 비아의 입구 막힘이나 보이드(Void)와 같은 결함 없이 Cu를 충전하였으며, 고속전단의 경우는 전단 속도가 증가할수록 취성파괴가 증가하는 경향을 보였다. 본 연구를 통하여 전해도금을 이용한 비아 홀 내 Cu의 고속 충전 및 로우알파 솔더 볼의 범프 형성이 가능하였으며, 이로 인한 전자제품의 소프트에러의 감소가 기대된다.