• Title/Summary/Keyword: Smart-chip

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Development of High Performance LonWorks Fieldbus Control Modules for Network-based Induction Motor Control (네트워크 기반 유도전동기 제어를 위한 고성능 LonWorks 제어모듈 개발)

  • Kim, Jung-Gon;Hong, Won-Pyo
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2005.05a
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    • pp.319-324
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    • 2005
  • The interface between host processor and the ShortStack Micro Server may be a Serial Communication Interface(SCI). The LonWorks control module with a high performance is developed, which is composed of the 8 bit PIC Microprocessor for host processor and the smart neuron chip for the ShoretStack Micro Server. This intelligent control board is verified as proceeding the various function tests from experimental system with an boost pump and inverter driving systems. It is also confirmed that the developed control module provides stably 0-10VDC linear signal to the input signal of inverter driving system for varying the induction motor speed. Thus, the experimental results show that the fabricating intelligent board carried out very well the various functions in the wide operating ranges of boost pump system. This developed control module expect to apply to industrial fields to require the comparatively exact control and monitoring such as multi-motor driving system with inverter, variable air volume system and the boost pump water supply systems.

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A Study on the Application of Elliptic Curve Cryptography to EMV (타원 곡선 암호의 EMV 적용에 관한 연구)

  • Kim, Woong;Lim, Dong-Jin
    • Proceedings of the KIEE Conference
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    • 2005.05a
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    • pp.269-271
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    • 2005
  • EMV was formed in February 1999 by Europay International, MasterCard International and Visa International to manage, maintain and enhance the EMV Integrated Circuit Card Specifications for Payment Systems as technology advances and the implementation of chip card programs become more prevalent. The formation of EMV ensures that single terminal and card approval processes are developed at a level that will allow cross payment system interoperability through compliance with the EMV specifications. A credit card environment of the domestic market adopted the standard Local-EMV to have the compatibility with EMV international standard and the EMV migration have been carried out b,# the step-by-step process. It may be possible to adopt various kinds of cryptographic algorithms, however, RSA public key algorithm is currently used. In this paper, as a public key algorithm for the authentication process, Elliptic Curve Cryptographic algorithm is applied to the EMV process. Implementation results is shown. and the possible changes necessary to accommodate Elliptic Curve Cryrtography is proposed.

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Enhanced Prediction Algorithm for Near-lossless Image Compression with Low Complexity and Low Latency

  • Son, Ji Deok;Song, Byung Cheol
    • IEIE Transactions on Smart Processing and Computing
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    • v.5 no.2
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    • pp.143-151
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    • 2016
  • This paper presents new prediction methods to improve compression performance of the so-called near-lossless RGB-domain image coder, which is designed to effectively decrease the memory bandwidth of a system-on-chip (SoC) for image processing. First, variable block size (VBS)-based intra prediction is employed to eliminate spatial redundancy for the green (G) component of an input image on a pixel-line basis. Second, inter-color prediction (ICP) using spectral correlation is performed to predict the R and B components from the previously reconstructed G-component image. Experimental results show that the proposed algorithm improves coding efficiency by up to 30% compared with an existing algorithm for natural images, and improves coding efficiency with low computational cost by about 50% for computer graphics (CG) images.

Development of a LonRF Intelligent Device-based Ubiquitous Home Network Testbed (LonRF 지능형 디바이스 기반의 유비쿼터스 홈네트워크 테스트베드 개발)

  • 이병복;박애순;김대식;노광현
    • Journal of Institute of Control, Robotics and Systems
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    • v.10 no.6
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    • pp.566-573
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    • 2004
  • This paper describes the ubiquitous home network (uHome-net) testbed and LonRF intelligent devices based on LonWorks technology. These devices consist of Neuron Chip, RF transceiver, sensor, and other peripheral components. Using LonRF devices, a home control network can be simplified and most devices can be operated on LonWorks control network. Also, Indoor Positioning System (IPS) that can serve various location based services was implemented in uHome-net. Smart Badge of IPS, that is a special LonRF device, can measure the 3D location of objects in the indoor environment. In the uHome-net testbed, remote control service, cooking help service, wireless remote metering service, baby monitoring service and security & fire prevention service were realized. This research shows the vision of the ubiquitous home network that will be emerged in the near future.

Development of the Active Vibration Absorber Using Piezoelectric Actuators (압전세라믹을 이용한 능동진동제어장치의 개발)

  • Kwak, Myung-Hoon;Heo, Seok;Kwak, Moon-K
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2001.11a
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    • pp.476-481
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    • 2001
  • This research is concerned with development of the active vibration absorber using piezoelectric actuators. This active isolation system consists of a-pairs of PZT actuators bonded on a S-shaped aluminum plate and the passive damping material. The active system is connected to the passive system in series. In this paper, one of the popular control techniques which have been successfully applied to the smart structure is the Positive Position Feedback(PPF) control. The digital PPF control lows downloaded to the DSP chip and a main program, which runs SISO PPF algorithm. The structure and dynamic characteristics of the proposed active vibration isolation system and described in detail. To demonstate the effectiveness of the active vibration control, the PPF controller is first employed. Experimental results show that the active vibration isolation is possible by means of the proposed system.

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Tutorial: Design and Optimization of Power Delivery Networks

  • Lee, Woojoo
    • IEIE Transactions on Smart Processing and Computing
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    • v.5 no.5
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    • pp.349-357
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    • 2016
  • The era of the Internet of Things (IoT) is upon us. In this era, minimizing power consumption becomes a primary concern for system-on-chip designers. While traditional power minimization and dynamic power management (DPM) techniques have been heavily explored to improve the power efficiency of devices inside very large-scale integration (VLSI) platforms, there is one critical factor that is often overlooked, which is the power conversion efficiency of a power delivery network (PDN). This paper is a tutorial that focuses on the power conversion efficiency of the PDN, and introduces novel methods to improve it. Circuit-, architecture-, and system-level approaches are presented to optimize PDN designs, while case studies for three different VSLI platforms validate the efficacy of the introduced approaches.

Dual band stop filter design by employing meander line for enhancing the immunity of IC (Meander Line 구조를 이용한 이중 대역 차단 필터 디자인)

  • Pyo, Sangwon;Pu, Bo;Nah, Wansoo
    • Proceedings of the KIEE Conference
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    • 2015.07a
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    • pp.133-134
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    • 2015
  • 최근 전자기술이 발달함에 따라, 전자기기의 집적도가 높아지고 있으며, 그에 따라 전자기적 간섭(Electromagnetic Interference)이 큰 문제로 대두되고 있다. 특히, 집적도가 높은 스마트 기기(Smart Device)의 AP(Applicaton Processor)의 경우, 여러 기능을 수행하는 부품이 집적된 SOC(System On Chip)이기 때문에, 전자기적 간섭에 더 민감할 수 있다. 더불어 LTE(Long Term Evolution)을 무선통신으로 이용하는 다양한 주파수대에서 전자기적 간섭은 어플리케이션 및 전자기기의 오작동을 초래할 수 있다. 이를 해결하기 위하여 본 논문에서는 칩패캐지 레벨의 Meander 구조의 기존 필터(Filter)가 가진 문제점을 해결한 구조를 설계하여 3차원 상의 전자장 시뮬레이션을 수행하였다. 또한, 칩의 내성(Immunity)이 취약한 여러 주파수 범위를 차단할 수 있는 이 중 대역차단 필터(Dual Band Stop Filter)를 Meader Line구조를 단순하게 만들어 설계하고 그에 따른 결과를 분석하였다.

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Core-A: A 32-bit Synthesizable Processor Core

  • Kim, Ji-Hoon;Lee, Jong-Yeol;Ki, Ando
    • IEIE Transactions on Smart Processing and Computing
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    • v.4 no.2
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    • pp.83-88
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    • 2015
  • Core-A is 32-bit synthesizable processor core with a unique instruction set architecture (ISA). In this paper, the Core-A ISA is introduced with discussion of useful features and the development environment, including the software tool chain and hardware on-chip debugger. Core-A is described using Verilog-HDL and can be customized for a given application and synthesized for an application-specific integrated circuit or field-programmable gate array target. Also, the GNU Compiler Collection has been ported to support Core-A, and various predesigned platforms are well equipped with the established design flow to speed up the hardware/software co-design for a Core-A-based system.

Energy Consumption Evaluation for Two-Level Cache with Non-Volatile Memory Targeting Mobile Processors

  • Matsuno, Shota;Togawa, Masashi;Yanagisawa, Masao;Kimura, Shinji;Sugibayashi, Tadahiko;Togawa, Nozomu
    • IEIE Transactions on Smart Processing and Computing
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    • v.2 no.4
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    • pp.226-239
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    • 2013
  • A number of systems have several on-chip memories with cache memory being one of them. Conventional cache memory consists of SRAM but the ratio of static energy to the total energy of the memory architecture becomes larger as the leakage power of traditional SRAM increases. Spin-Torque Transfer RAM (STT-RAM), which is a variety of Non-Volatile Memory (NVM), has many advantages over SRAM, such as high density, low leakage power, and non-volatility, but it consumes too much writing energy. This study evaluated a wide range of energy consumptions of a two-level cache using NVM partially on a mobile processor. Through a number of experimental evaluations, it was confirmed that the use of NVM partially in the two-level cache effectively reduces energy consumption significantly.

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Technology Trend and Requirement of Mobile Displays Using Low-Temperature Poly-Si (LTPS) Technologies

  • Kwon, Oh-Kyong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.409-412
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    • 2007
  • A lot of research for system-on-panel(SOP) have been done to integrate display systems including data driver, gate driver, timing controller, DC-DC converter, and smart functions such as embedded touch screen, ambient brightness sensing and luminance control, finger printing on the glass. Recently, the cost of an one-chip driver IC with various functions has decreased rapidly, and new mobile display interface technologies have been introduced. So it is necessary to examine the feasibility of SOP for practical mobile applications. In this paper, we will re-examine LTPS technologies for mobile displays in terms of various aspects and discuss the practical limitations on SOP technology and future technology trend of mobile displays.

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