• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.11
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• pp.226-232
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• 2020

The Stage-Gate is a market-oriented model that aims to launch new products on the market. Therefore, it can be appropriately introduced and applied to the operation and management of NSSCP, which is undergoing demonstration projects for Daegu and Siheung. In addition, smart cities have the characteristics of convergence and complex among various innovative technologies. When the Stage-Gate is introduced, the performance can be managed centering on the outcomes for each research institution. Therefore, the NSSCP is applying the Stage-Gate for the first time among national R&D projects to improve the quality of the research results and to demonstrate and commercialize them successfully. This paper reviews the operation results of the 1st and 2nd years when the State-Gate was introduced and analyzes the opinions of an R&D management agency, research institutes, and gate reviewers to present the supplementary and improvements for applying to the evaluation process for the next year. When operating the Stage-Gate by optimizing the situation for each project and being wary of inefficiencies caused by the rigid operation, it is expected that flexible evaluation for each outcome will be possible according to the convergence characteristics of smart cities.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.7
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• pp.176-184
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• 1996

To overcome the drawbacks of conventional LDMOSFETs, we propose RESURF EDMOSFETs which can be adapted in varous circuit applications, be driven without charge pumping circuity and thowe threshold voltage can be adjusted. The devices have the diffused drift region formed by a high tmperature process before the gate oxidaton. After the polysilicon gate electrode formation, a fraction of the drift region around the gate edge is opened for supplemental self-aligned ion implantation to obtain self-aligned drift region. This leads to a shorter gate length and desirable drift region junction contour under the gate edge for minimum specific-on-resistance. In additon, a and maximize the breakdown voltage. Also, by biasing the metal field plate, we can reduce the specific-on-resistance further. The devices are optimized by using the TSUPREM-4 process simulator and the MEDICI device simulator. The optimized devices have the breakdwon voltage and the specific-on-resistance of 101.5V and 1.14m${\Omega}{\cdot}cm^{2}$, respectively for n-channel RESURF EDMOSFET, and 98V and 2.75m.ohm..cm$^{2}$ respectively for p-channel RESURF EDMOSFET. To check the validity of the simulations, we fabricated n-channel EDMOSFETs and confirmed the measured breakdown voltage of 97V and the specific-on-resistance of 1.28m${\Omega}{\cdot}cm^{2}$. These results are superior to those of any other reported power devices for smart power IC applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.10
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• pp.1-6
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• 2008

The holding voltage of the high-voltage MOSFETs in snapback condition is much smaller than the power supply voltage. Such characteristics may cause the latcup-like problems in the Smart Power ICs if these devices are directly used in the ESD (Electrostatic Discharge) power clamp. In this work, a latchup-free design based on the Drain-Extended PMOS (DEPMOS) adopting gate VDD structure is proposed. The operation region of the proposed gate-VDD DEPMOS ESD power clamp is below the onset of the snapback to avoid the danger of latch-up. From the measurement on the devices fabricated using a $0.35\;{\mu}m$ BCD (Bipolar-CMOS-DMOS) Process (60V), it was observed that the proposed ESD power clamp can provide 500% higher ESD robustness per silicon area as compared to the conventional clamps with gate-driven LDMOS (lateral double-diffused MOS).

• Proceedings of the Korean Magnestics Society Conference
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• 2004.12a
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• pp.194-195
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• 2004

• Journal of the Korea Society of Computer and Information
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• v.16 no.11
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• pp.9-15
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• 2011

In this paper, we design and implement of gate management system by face recognition using smart phone. We investigate various algorithms for face recognition on smart phones. First step in any face recognition system is face detection. We investigated algorithms like color segmentation, template matching etc. for face detection, and Eigen & Fisher face for face recognition. The algorithms have been first profiled in MATLAB and then implemented on the Android phone. While implementing the algorithms, we made a tradeoff between accuracy and computational complexity of the algorithm mainly because we are implementing the face recognition system on a smart phone with limited hardware capabilities.

• Journal of Korea Society of Industrial Information Systems
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• v.18 no.5
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• pp.45-50
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• 2013

Recently, as the market for SMART TV expands, the camera is embedded for providing various user experience. However, this leads to occurrence of camera failure due to TV power up sequence problem, which are usually not detectable in conventional test equipments. Although the failure-detection can be possible by re-generating control signals for audio interface with new equipment, it is expensive and also requires much time to test. In this paper, for SMART TV, FPGA(Field Programmable Gate Array)-based failure-detection system is proposed which can lead to reduction of both cost and time for test.

• The Journal of the Korea Contents Association
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• v.9 no.6
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• pp.37-44
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• 2009

In this paper, we present a switched beamforming RFID reader and propose a convenient shopping system using it. The smart gate with the switched beamforming RFID reader(s) improves tag detection probability, tag false alarm probability, automatic detection functionality of shopping system compared to existing RFID based systems. The proposed system consists of a smart gate to read and verify the tags within cart, a check-out counter to approve customer purchase, and a central server to manage inventory & delivery and to analyze customer purchase trend. The proposed shopping system is more practical, convenient, and cost-effective to A/S than existing RFID shopping systems.

• International journal of advanced smart convergence
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• v.5 no.3
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• pp.66-71
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• 2016

Smart building gate security control system using smartphone integrated with near field communication (NFC) has become part of daily life usage these days. The technology change in replacing RF NFC device using visible light communication technology based approach growing faster in recent days. This paper propose a design and development of gate security control system using color code based user authentication ID generation as part of an intelligent access control system to control automatic door open and close. In this approach gate security access control use the recent visible light communication technology trends to transfer the user specific authentication code to door access control system using color code on smartphone screen. Using a camera in the door access control system (ACS), color codes on smartphone screens are detected and matched to the database of authenticated user to open the door automatically in gate security system. We measure the visual light communication technology efficiency as a part of the research and the experiments have revealed that more than 95% users authenticated correctly at the suggested experiment environment on gate security control system.

• International journal of advanced smart convergence
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• v.12 no.4
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• pp.1-7
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• 2023

Large-size, organic light-emitting device (OLED) panels based on highly reliable gate driver circuits integrated using InGaZnO thin film transistors (TFTs) were developed to achieve ultra-high resolution TVs. These large-size OLED panels were driven by using a novel gate driver circuit not only for displaying images but also for sensing TFT characteristics for external compensation. Regardless of the negative threshold voltage of the TFTs, the proposed gate driver circuit in OLED panels functioned precisely, resulting from a decrease in the leakage current. The falling time of the circuit is approximately 0.9 ㎲, which is fast enough to drive 8K resolution OLED displays at 120 Hz. 120 Hz is most commonly used as the operating voltage because images consisting of 120 frames per second can be quickly shown on the display panel without any image sticking. The reliability tests showed that the lifetime of the proposed integrated gate driver is at least 100,000 h.

• Macromolecular Research
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• v.17 no.7
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• pp.528-532
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• 2009

The size and shape of free volume (FV) holes available in membrane materials control the rate of gas diffusion and its permeability. Based on this principle, a segmented, thermo-sensitive polyurethane (TSPU) membrane with functional gate, i.e., the ability to sense and respond to external thermo-stimuli, was synthesized. This smart membrane exhibited close-open characteristics to the size of the FV hole and water vapor permeation and thus can be used as smart food packaging materials. Differential scanning calorimetry (DSC), dynamic mechanical analysis (DMA), positron annihilation lifetimes (PAL) and water vapor permeability (WVP) were used to evaluate how the morphological structure of TSPU and the temperature influence the FV holes size. In DSC and DMA studies, TSPU with a crystalline transition reversible phase showed an obvious phase-separated structure and a phase transition temperature at $53^{\circ}C$ (defined as the switch temperature and used as a functional gate). Moreover, the switch temperature ($T_s$) and the thermal-sensitivity of TSPU remained available after two or three thermal cyclic processes. The PAL study indicated that the FV hole size of TSPU is closely related to the $T_s$. When the temperature varied cyclically from $T_s-10{\circ}C$ to $T_s+10^{\circ}C$, the average radius (R) of the FV holes of the TSPU membrane also shifted cyclically from 0.23 to 0.467 nm, exhibiting an "open-close" feature. As a result, the WVP of the TSPU membrane also shifted cyclically from 4.30 to $8.58\;kg/m^2{\cdot}d$, which produced an "increase-decrease" response to the thermo-stimuli. This phase transition accompanying significant changes in the FV hole size and WVP can be used to develop "smart materials" with functional gates and controllable water vapor permeation, which support the possible applications of TSPU for food packaging.