• Journal of Power Electronics
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• v.10 no.4
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• pp.365-373
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• 2010

This paper proposes a hybrid single carrier sinusoidal modulation suitable for multiphase multilevel inverters. Multiphase multilevel inverters are controlled by hybrid modulation to provide multiphase variable voltage and a variable frequency supply. The proposed modulation combines the benefits of fundamental frequency modulation and single carrier sinusoidal modulation (SC-SPWM) strategies. The main characteristics of hybrid modulation are a reduction in switching losses and improved harmonic performance. The proposed algorithm can be applied to cascaded multilevel inverter topologies. It has low computational complexity and it is suitable for hardware implementations. SC-SPWM and its base modulation design are implemented on a TMS320F2407 digital signal processor (DSP). A Complex Programmable Logic Device realizes the hybrid PWM algorithm and it is integrated with a DSP processor for hybrid SC-SPWM generation. The feasibility of this hybrid modulation is verified by spectral analysis, power loss analysis, simulation and experimental results.

• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.5
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• pp.851-858
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• 2017

In this study, the voltage control system of a single phase full bridge inverter was designed based on the SPWM driving method. The voltage control system consists of a single-phase full-bridge inverter, a PI controller for linearly compensating the error between the reference voltage and the output voltage, a PWM driving circuit for generating the gate signal using the SPWM method from the controller signal, and an LC filter for filtering the inverter output voltage waveform into sinusoidal waveform. Finally, the voltage control system of a single-phase full-bridge inverter based on the PWM driving method was modeled using EMTP-RV and by showing that the output voltage accurately converges the reference voltage through several simulation examples, the validity of the control system design was verified.

• Proceedings of the KIPE Conference
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• 2003.07b
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• pp.511-515
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• 2003

This paper presents a novel prototype of the utility-interfaced sinusoidal pulse width modulated (SPWM) inverter using the high-frequency flyback transformer fur the small-scale solar photo-voltaic power conditioner (1kW - 4kW). The proposed SPWM power conditioner circuit with a high-frequency link has a function of electrical isolation, which is vital fur solar photovoltaic power conditioner systems with the viewpoint of safety and convenience. The discontinuous conduction mode (DCM) operation of the flyback transformer is also maintained to simplify the topology of the inverter circuit and control scheme. First, the operating principle of the proposed circuit is described far the understanding of the circuit parameters establishment. Then, the digitally constructed SPWM control scheme is presented. The proposed circuit is verified by the computer simulation and the prototype experiment.

• Journal of Power Electronics
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• v.13 no.5
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• pp.829-840
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• 2013

The modified sinusoidal pulse-width modulation (SPWM) is one of the PWM techniques used in three-phase AC-DC buck converters. The modified SPWM works without the current sensor (the converter is current sensorless), improves production of sinusoidal AC current, enables obtainment of near-unity power factor, and controls output voltage through modulation gain (ranging from 0 to 1). The main problem of the modified SPWM is the huge starting current and voltage (during transient) that results from a large step change from the reference voltage. When the load changes, the output voltage significantly drops (through switching losses and non-ideal converter elements). The single-input single-output (SISO) approach with minor-loop voltage feedback controller presented here overcomes this problem. This approach is created on a theoretical linear model and verified by discrete-model simulation on MATLAB/Simulink. The capability and effectiveness of the SISO approach in compensating start-up current/voltage and in achieving zero steady-state error were tested for transient cases with step-changed load and step-changed reference voltage for linear and non-linear loads. Tests were done to analyze the transient performance against various controller gains. An experiment prototype was also developed for verification.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.3
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• pp.262-271
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• 2002

In PWM inverters used in traction motor drive systems, the switching frequency is restricted by their large power capacity and thus the electromagnetic acoustic noise is generated. To reduce such an audible noise, the new MRSF-PWM(Modified Random Switching Frequency PWM) method is proposed. In the Proposed MRSF-PWM method, both triangular wave and sawtooth wave are used together as carrier waves for harmonic diffusion and reference wave is generated by injecting 3rd harmonic into the stone wave to expand the linear control region of output voltages. To verify the validity of the proposed MRSF-PWM method, computer simulations are carried out. And the results show that the MRSF-PWM method is more excellent than other RPWM methods in the aspects of both linearity and harmonic diffusion md more effective than SPWM(Sinusoidal PWM) method for the reduction of an audible noise.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.6
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• pp.488-493
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• 2014

This paper presents a carrier-based pulse-width modulation(PWM) method for reducing the common-mode voltage of a three-level four-leg converter. The idea of the proposed PWM method is intuitive and easy to be implemented in digital signal processor-based converter control systems. On the basis of the analysis of space-vector PWM(SVPWM) and sinusoidal PWM(SPWM) switching patterns, the fourth leg pole voltage of the three-phase converter called "f leg pole voltage" is manipulated to reduce the common-mode voltage. To synthesize f leg pole voltage for the suppression of the common-mode voltage, positive and negative pole voltage references of f leg are calculated. An offset voltage is also deduced to prevent the distortion of a, b, and c phase voltages. The feasibility of the proposed PWM method is verified by simulation and experimental results. The common-mode voltage of the proposed PWM method in peak-to-peak value is 33% in comparison with that of the conventional SVPWM method. The transition number of the common-mode voltage is also reduced to 25%.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1517-1523
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• 2015

The wavelet PWM (WPWM) technique has been applied in two-level inverters successfully, but directly applying the WPWM technique to three-level inverters is impossible. This paper proposes a WPWM technique suitable for a single-phase three-level inverter. The work analyzes the control strategy with the WPWM and obtains the design of its parameters. Compared with the SPWM technique for a single-phase three-level inverter under the same conditions, the WPWM can obtain high magnitudes of the output fundamental frequency component, low total harmonic distortion, and simpler digital implementation. The feasibility experiment is given to verify of the proposed WPWM technique.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.2018-2030
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• 2015

A two stage ac drive configuration consisting of a single-phase line commutated rectifier and a three-phase voltage source inverter (VSI) is very common in low and medium power applications. The deterministic pulse width modulation (PWM) methods like sinusoidal PWM (SPWM) could not be considered as an ideal choice for modern drives since they result mechanical vibration and acoustic noise, and limit the application scope. This is due to the incapability of the deterministic PWM strategies in sprawling the harmonic power. The random PWM (RPWM) approaches could solve this issue by creating continuous harmonic profile instead of discrete clusters of dominant harmonics. Insufficient filtering at dc link results in the amplitude distortion of the input dc voltage to the VSI and has the most significant impact on the spectral errors (difference between theoretical and practical spectra). It is obvious that the sprawling effect of RPWM undoubtedly influenced by input fluctuation and the discrete harmonic clusters may reappear. The influence of dc link fluctuation on harmonics and their spreading effect in the VSI remains invalidated. A case study is done with four different filter capacitor values in this paper and results are compared with the constant dc input operation. This paper also proposes an ingenious RPWM, a ripple dosed sinusoidal reference-random carrier PWM (RDSRRCPWM), which has the innate capacity of suppressing the effect of input fluctuation in the output than the other modern PWM methods. MATLAB based simulation study reveals the fundamental component, total harmonic distortion (THD) and harmonic spread factor (HSF) for various modulation indices. The non-ideal dc link is managed well with the developed RDSRRCPWM applied to the VSI and tested in a proto type VSI using the field programmable gate array (FPGA).

• Proceedings of the KIPE Conference
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• 2016.11a
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• pp.218-219
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• 2016

This paper present Phase Shifted with carrier based on Sinusoidal PWM(SPWM) by using Cascaded NPC/H-birdge converter. The proposed Phase Shifted PWM method is adding third harmonic injection in switching signal. The advantage of the proposed method is reducing the voltage and capacity of the capacitor. This paper compare general Phase Shifted method with proposed Phase Shifted method that added the third harmonic injection. Each PWM method is tested without considering the switching loss by using PSIM 9.1.4 simulation.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.5
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• pp.443-449
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• 2005

In this paper, parallel operation systems with Z-source Inverters for the fuel cell systems are discussed. The carrier phase shifted SPWM(Sinusoidal Pulse Width Modulation) has an advantage in reducing harmonics of output current. However when this technique applies in parallel operation of Z-source inverters, it additionally produces circulating currents. The circulating current is analyzed and a method to prevent the circulating current is applied to the parallel operation systems of Z-source inverters. To maintain high performance with reduced circulating current in inverter output and low harmonic components in load current, circulating current reactors are used. The proposed approach is verified through simulation and experiment.