• Title/Summary/Keyword: Single-chip

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Injection Mold Technology of Protein Chip for Point-of-Care (현장진단용 단백질 칩 사출금형기술)

  • Lee, Sung-Hee;Ko, Young-Bae;Lee, Jong-Won;Jung, Hae-Chul;Park, Jae-Hyun;Lee, Ok-Sung
    • Design & Manufacturing
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    • v.6 no.2
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    • pp.74-78
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    • 2012
  • A multi-cavity injection mold system of protein chip for point-of-care with cavity temperature and pressure sensors was proposed in this work. In advance of manufacturing for the multi-cavity injection mold system, a single cavity injection mold system to mold protein chip was considered. Injection molding analysis for the presented system was performed to optimize the process of the molding and suggest guides to design. On the basis of the results for the single cavity system, a multi-cavity injection mold system for protein chip was analyzed, designed and manufactured with cavity temperature and pressure sensors. Results of balanced filling for protein chip models were obtained from the presented mold system.

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A Study on the Characteristics Comparison of Single Chip and Two Chip Transceiver for the Fiber Optic Modules (광모듈용 단일 칩 및 2 칩 트랜시버의 특성비교 연구)

  • Chai Sang-Hoon;Jung Hyun-Chae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.5 s.347
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    • pp.48-53
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    • 2006
  • This paper describes the electrical characteristics of monolithic optical transceiver circuitry being used in the fiber optic modules. It has been designed and fabricated, and compared with two chips version transceiver when operates at 155.52 Mbps data rates. To avoid noise and interference between transmitter and receiver on one chip, layout techniques such as special placement, power supply separation, guard ring, and protection wall were used in the design. To compare the two kind of fiber optic modules using each chip, single chip version has similar properties to two chip version in the electrical characteristics as noise and others.

Design of digital relay controller on a single chip (디지털 보호 계전기 전용 제어 칩 설계)

  • Seo, Jong-Wan;Jung, Ho-Sung;Kweon, Gi-Beak;Suh, Hui-Suk;Shin, Myong-Chul
    • Proceedings of the KIEE Conference
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    • 2000.07a
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    • pp.215-217
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    • 2000
  • Protective relay play a crucial role in the proper operation of a power system, and the reliable transfer of electrical power. This paper deals with the design and implementation of a digital protective relay on a single chip. Implementation on the FPGA(Field Programmable Gate Array) of the chip of digital protective relay. This protective relaying chip monitors the frequency and the voltage and current of the power system. And report the voltage, the current. the frequency, active power and reactive power.

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The Research of System-On-Chip Design for Railway Signal System (철도신호를 위한 단일칩 개발에 관한 연구)

  • Park, Joo-Yul;Kim, Hyo-Sang;Lee, Joon-Hwan;Kim, Bong-Taek;Chung, Ki-Seok
    • Proceedings of the KSR Conference
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    • 2008.06a
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    • pp.572-578
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    • 2008
  • As the railway transportation is getting faster and its operation speed has increased rapidly, its signal control has been complicated. For real time signal processing it is very important to prohibit any critical error from causing the system to malfunction. Therefore, handling complicated signals effectively while maintaining fault-tolerance capability is highly expected in modern railway transportation industry. In this paper, we suggest an SoC (Sytem-on-Chip) design method to integrate these complicated signal controlling mechanism with fault tolerant capability in a single chip. We propose an SoC solution which contains a high performance 32-bit embedded processor, digital filters and a PWM unit inside a single chip to implement ATO's, ATC's, ATP's and ATS's digital signal-processing units. We achieve an enhanced reliability against the calculation error by adding fault tolerance features to ensure the stability of each module.

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Detection of SNP Using Microelectrode Array Biochip (마이크로전극어레이형 바이오칩을 이용한 SNP의 검출)

  • Choi, Yong-Sung;Kwon, Young-Soo;Paek, Dae-Hee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07b
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    • pp.845-848
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    • 2004
  • High throughput analysis using a DNA chip microarray is powerful tool in the post genome era. Less labor-intensive and lower cost-performance is required. Thus, this paper aims to develop the multi-channel type label-free DNA chip and detect SNP (Single nucleotide polymorphisms). At first, we fabricated a high integrated type DNA chip array by lithography technology. Various probe DNAs were immobilized on the microelectrode array. We succeeded to discriminate of DNA hybridization between target DNA and mismatched DNA on microarray after immobilization of a various probe DNA and hybridization of label-free target DNA on the electrodes simultaneously. This method is based on redox of an electrochemical ligand.

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Issues in Building Large RSFQ Circuits (대형 RSFQ 회로의 구성)

  • Kang, J.H.
    • Progress in Superconductivity
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    • v.3 no.1
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    • pp.17-22
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    • 2001
  • Practical implementation of the SFQ technology in most application requires more than single-chip-level circuit complexity. Multiple chips have to be integrated with a technology that is reliable at cryogenic temperatures and supports an inter-chip data transmission speed of tens of GHz. In this work, we have studied two basic issues in building large RSFQ circuits. The first is the reliable inter-chip SFQ pulse transfer technique using Multi-Chip-Module (MCM) technology. By noting that the energy contained in an SFQ pulse is less than an attojoule, it is not very surprising that the direct transmission of a single SFQ pulse through MCM solder bump connectors can be difficult and an innovative technique is needed. The second is the recycling of the bias currents. Since RSFQ circuits are dc current biased the large RSFQ circuits need serial biasing to reduce the total amount of current input to the circuit.

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Single-Chip Controller Design for Piezoelectric Actuators using FPGA (FPGA를 이용한 압전소자 작동기용 단일칩 제어기 설계)

  • Yoon, Min-Ho;Park, Jungkeun;Kang, Taesam
    • Journal of Institute of Control, Robotics and Systems
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    • v.22 no.7
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    • pp.513-518
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    • 2016
  • The piezoelectric actuating device is known for its large power density and simple structure. It can generate a larger force than a conventional actuator and has also wide bandwidth with fast response in a compact size. To control the piezoelectric actuator, we need an analog signal conditioning circuit as well as digital microcontrollers. Conventional microcontrollers are not equipped with an analog part and need digital-to-analog converters, which makes the system bulky compared with the small size of piezoelectric devices. To overcome these weaknesses, we are developing a single-chip controller that can handle analog and digital signals simultaneously using mixed-signal FPGA technology. This gives more flexibility than traditional fixed-function microcontrollers, and the control speed can be increased greatly due to the parallel processing characteristics of the FPGA. In this paper, we developed a floating-point multiplier, PWM generator, 80-kHz power control loop, and 1-kHz position feedback control loop using a single mixed-signal FPGA. It takes only 50 ns for single floating-point multiplication. The PWM generator gives two outputs to control the charging and discharging of the high-voltage output capacitor. Through experimentation and simulation, it is demonstrated that the designed control loops work properly in a real environment.

Chip Forming Characteristics of Bi-S Free Machining Steel (Bi-S 쾌삭강의 칩생성특성)

  • 조삼규
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.9 no.3
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    • pp.48-54
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    • 2000
  • In this study the characteristics of chip formation of the cold drawn Bi-S free machining steels were assessed. And for comparison those of the cold drawn Pb-S free machining steel the hot rolled low carbon steel which has MnS as free machining inclusions and the conventional steels were also investigated. During chip formation the cold drawn free machining steels show relatively little change in thickness and width of chip compare to those of the conventional carbon steels. And a single parameter which indicates the degree of deformation during chip formation chip cross-section area ratio is introduced. The chip cross-section area ratio is defined as chip cross-section area is divided by undeformed chip cross-section area. The variational patters of the chip cross-section area ratio of the materials cut are similar to those of the shear strain values. The shear stress however seems to be dependent on the carbon content of the materials. The cold drawn Bi-S and Pb-S steels show nearly the same chip forming behaviors and the energy consumed during chip formation is almost same. A low carbon steel without free machining aids shows poor chip breakability due to its high ductility. By introducing a small amount of free machining inclusions such as MnS Bi, Pb or merely increasing carbon content the chip breakability improves significantly.

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A Design of MMIC Mixer for I/Q Demodulator of Non-contact Near Field Microwave Probing System (비접촉 마이크로웨이브 프루브 시스템의 I/Q Demodulator를 위한 MMIC Mixer의 설계)

  • Ryu, Keun-Kwan;Kim, Sung-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.5
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    • pp.1023-1028
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    • 2012
  • A MMIC (Monolithic Microwave Integrated Circuit) mixer chip using the Schottky diode of an GaAs p-HEMT process has been developed for the I/Q demodulator of non-contact near field microwave probing system. A single balanced mixer type is adopted to achieve simple structure of the I/Q demodulator. A quadrature hybrid coupler and a quarter wavelength transmission line for 180 degree hybrid are realized with lumped elements of MIM capacitor and spiral inductor to reduce the mixer chip size. According to the on-wafer measurement, this MMIC mixer covers RF and LO frequencies of 1650MHz to 2050MHz with flat conversion loss. The MMIC mixer with miniature size of $2.5mm{\times}1.7mm$ demonstrates conversion loss below 12dB for both variations of RF and LO frequencies, LO-to-IF isolation above 43dB and RF-to-IF isolation above 23dB, respectively.

Development of a Signal Conditioning Circuit for Capacitive Displacement Sensors Using a Commercial Single Chip Solution (상용 Single Chip Solution을 이용한 정전용량형 변위 센서 신호 처리 모듈 개발)

  • Kim J.A.;Kim J.W.;Eom T.B.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2006.05a
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    • pp.31-32
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    • 2006
  • A signal conditioning circuit for capacitive sensors was developed using a commercial single chip solution. Since capacitive displacement sensors can achieve high resolution and linearity, they have been widely used as precision sensors within the range of several hundred micrometers. However, they inherently have a limitation in low frequency range and some nonlinearity characteristics and so a specially designed signal conditioning circuit is needed to handle these properties. Up to now, several companies already have succeeded in the development of the capacitive sensors system and they are commercially available in the market. In this research, to construct the signal processing circuits more easily and simply, we used a universal LVDT signal conditioner (AD698). Since the AD698 provides one chip solution for a basic signal processing including modulation and demodulation using various internal components, we can build the processing circuits successfully with minimal additional circuits: a compensation circuits for the drift caused by the bias current of OP amplifiers and a fine adjustment circuit for the elimination of nonlinearity. The signal processing circuits shows nonlinearity less than 0.05% in the comparison with a laser interferometer.

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